DSPIC30F5011-20I/PTG Microchip Technology, DSPIC30F5011-20I/PTG Datasheet - Page 213

• Manufacturer Part Number: DSPIC30F5011-20I/PTG
• Description: IC, DSC, 16BIT, 66KB, 40MHZ 5.5V TQFP-64
• Manufacturer: Microchip Technology
• Series: DsPIC30Fr

Specifications of DSPIC30F5011-20I/PTG

• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 52
• Flash Memory Size: 66KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INDEX
Numerics
12-bit Analog-to-Digital Converter (A/D) Module .............. 129
A
A/D .................................................................................... 129
AC Characteristics ............................................................ 176
AC Temperature and Voltage Specifications .................... 176
AC-Link Mode Operation .................................................. 126
ADC
ADC Conversion Speeds .................................................. 132
Address Generator Units .................................................... 43
Alternate Vector Table ........................................................ 41
Analog-to-Digital Converter. See A/D.
Assembler
Automatic Clock Stretch...................................................... 96
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 23
Bit-Reversed Addressing .................................................... 46
Block Diagrams
© 2008 Microchip Technology Inc.
Aborting a Conversion .............................................. 131
ADCHS Register ....................................................... 129
ADCON1 Register..................................................... 129
ADCON2 Register..................................................... 129
ADCON3 Register..................................................... 129
ADCSSL Register ..................................................... 129
ADPCFG Register..................................................... 129
Configuring Analog Port Pins.............................. 62, 136
Connection Considerations....................................... 136
Conversion Operation ............................................... 130
Effects of a Reset...................................................... 135
Operation During CPU Idle Mode ............................. 135
Operation During CPU Sleep Mode.......................... 135
Output Formats ......................................................... 135
Power-down Modes .................................................. 135
Programming the Sample Trigger............................. 131
Register Map............................................................. 137
Result Buffer ............................................................. 130
Sampling Requirements............................................ 134
Selecting the Conversion Sequence......................... 130
Internal LPRC Accuracy............................................ 179
Load Conditions ........................................................ 176
16-bit Mode ............................................................... 126
20-bit Mode ............................................................... 127
Selecting the Conversion Clock ................................ 131
MPASM Assembler................................................... 164
During 10-bit Addressing (STREN = 1)....................... 96
During 7-bit Addressing (STREN = 1)......................... 96
Receive Mode ............................................................. 96
Transmit Mode ............................................................ 96
Requirements............................................................ 183
Timing Characteristics .............................................. 183
Example ...................................................................... 46
Implementation ........................................................... 46
Modifier Values Table ................................................. 47
Sequence Table (16-Entry)......................................... 47
12-bit A/D Functional ................................................ 129
16-bit Timer1 Module .................................................. 67
16-bit Timer2............................................................... 73
16-bit Timer3............................................................... 73
16-bit Timer4............................................................... 78
16-bit Timer5............................................................... 78
BOR Characteristics ......................................................... 175
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module ..................................................................... 109
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 139
Control Registers ................................................................ 50
Core Architecture
CPU Architecture Overview ................................................ 15
Customer Change Notification Service............................. 219
Customer Notification Service .......................................... 219
Customer Support............................................................. 219
D
Data Accumulators and Adder/Subtractor .......................... 21
dsPIC30F5011/5013
32-bit Timer2/3 ........................................................... 72
32-bit Timer4/5 ........................................................... 77
CAN Buffers and Protocol Engine ............................ 110
DCI Module............................................................... 120
Dedicated Port Structure ............................................ 61
DSP Engine ................................................................ 20
dsPIC30F5011............................................................ 10
dsPIC30F5013............................................................ 11
External Power-on Reset Circuit .............................. 147
I
Input Capture Mode.................................................... 81
Oscillator System...................................................... 141
Output Compare Mode ............................................... 85
Reset System ........................................................... 145
Shared Port Structure................................................. 62
SPI.............................................................................. 90
SPI Master/Slave Connection..................................... 90
UART Receiver......................................................... 102
UART Transmitter..................................................... 101
Characteristics.......................................................... 174
Timing Requirements ............................................... 182
MPLAB C18.............................................................. 164
MPLAB C30.............................................................. 164
Baud Rate Setting .................................................... 114
CAN1 Register Map.................................................. 116
Frame Types ............................................................ 109
I/O Timing Characteristics ........................................ 201
I/O Timing Requirements.......................................... 201
Message Reception.................................................. 112
Message Transmission............................................. 113
Modes of Operation .................................................. 111
Overview................................................................... 109
Characteristics.......................................................... 180
Requirements ........................................................... 180
Data EEPROM Block Erase ....................................... 56
Data EEPROM Block Write ........................................ 58
Data EEPROM Read.................................................. 55
Data EEPROM Word Erase ....................................... 56
Data EEPROM Word Write ........................................ 57
Erasing a Row of Program Memory ........................... 51
Initiating a Programming Sequence ........................... 52
Loading Write Latches................................................ 52
NVMADR .................................................................... 50
NVMADRU ................................................................. 50
NVMCON.................................................................... 50
NVMKEY .................................................................... 50
Overview..................................................................... 15
2
C .............................................................................. 94
DS70116H-page 213