LFE2-35E-5FN484C LATTICE SEMICONDUCTOR, LFE2-35E-5FN484C Datasheet - Page 343
![no-image](/images/manufacturer_photos/0/3/381/lattice_semiconductor_sml.jpg)
LFE2-35E-5FN484C
Manufacturer Part Number
LFE2-35E-5FN484C
Description
IC, LATTICEECP2 FPGA, 420MHZ, FPBGA-484
Manufacturer
LATTICE SEMICONDUCTOR
Series
LatticeECP2r
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2-35E-5FN484C
No. Of Logic Blocks
32000
No. Of Macrocells
16000
No. Of Speed Grades
5
No. Of I/o's
331
Clock Management
DLL, PLL
I/o Supply Voltage
3.465V
Total Ram Bits
332Kbit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-35E-5FN484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 343 of 385
- Download datasheet (3Mb)
LFE2M70E/SE and LFE2M100E/SE Logic Signal Connections: 1152 fpBGA
Lattice Semiconductor
Number
GNDIO
GNDIO
GNDIO
GNDIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
M28
M27
M26
M32
M31
M30
Ball
K34
K33
K30
K29
H33
H34
H31
H32
H30
B33
C33
B34
C32
B32
A33
C34
A32
B31
A31
L27
L34
L33
L32
L31
L28
L29
L30
J34
J33
J32
J31
J30
J29
J27
J28
-
URC_SQ_HDOUTN0
URC_SQ_HDOUTN1
URC_SQ_HDOUTP0
URC_SQ_VCCRX0
URC_SQ_VCCOB0
URC_SQ_VCCTX0
URC_SQ_VCCTX1
URC_SQ_HDINP0
URC_SQ_VCCIB0
URC_SQ_HDINN0
Function
Ball/Pad
VCCIO2
GNDIO2
VCCIO2
GNDIO2
VCCIO2
GNDIO2
VCCIO2
GNDIO2
VCCIO2
PR26B
PR26A
PR25B
PR25A
PR24B
PR24A
PR22B
PR22A
PR21B
PR21A
PR20B
PR20A
PR19B
PR19A
PR18B
PR18A
PR17B
PR17A
PR16B
PR16A
PR15B
PR15A
PR14B
PR14A
PR13B
PR13A
PR11B
PR11A
XRES
PR9B
PR9A
-
LFE2M70E/SE
Bank
12
12
12
12
12
12
12
12
12
12
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
-
-
-
-
-
RUM0_SPLLC_IN_A/RDQ15
RUM0_SPLLT_IN_A/RDQ15
Dual Function
VREF2_2
VREF1_2
RDQS15
RDQ28
RDQ28
RDQ28
RDQ28
RDQ28
RDQ28
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
Differential
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
4-243
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
URC_SQ_HDOUTN0
URC_SQ_HDOUTN1
URC_SQ_HDOUTP0
URC_SQ_VCCRX0
URC_SQ_VCCTX0
URC_SQ_VCCOB0
URC_SQ_VCCTX1
URC_SQ_HDINP0
URC_SQ_VCCIB0
URC_SQ_HDINN0
Function
Ball/Pad
VCCIO2
GNDIO2
VCCIO2
VCCIO2
GNDIO2
VCCIO2
GNDIO2
VCCIO2
GNDIO2
VCCIO2
PR30B
PR30A
PR29B
PR29A
PR28B
PR28A
PR22B
PR22A
PR21B
PR21A
PR20B
PR20A
PR19B
PR19A
PR18B
PR18A
PR17B
PR17A
PR16B
PR16A
PR15B
PR15A
PR14B
PR14A
PR13B
PR13A
PR11B
PR11A
XRES
PR9B
PR9A
LatticeECP2/M Family Data Sheet
LFE2M100E/SE
Bank
12
12
12
12
12
12
12
12
12
12
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
-
-
-
-
RUM0_SPLLC_IN_A/RDQ15
RUM0_SPLLT_IN_A/RDQ15
Dual Function
Pinout Information
VREF2_2
VREF1_2
RDQS15
RDQ32
RDQ32
RDQ32
RDQ32
RDQ32
RDQ32
RDQ23
RDQ23
RDQ23
RDQ23
RDQ23
RDQ23
RDQ23
RDQ23
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
RDQ15
Differential
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
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