PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 4

• Manufacturer Part Number: PIC24FJ64GB004-I/ML
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 16 Bit
• Program Memory Size: 64 KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Embedded Interface Type: I2C, LIN, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ64GB004
6. Module: Oscillator (Secondary Oscillator
7. Module: SPI (Master Mode)
DS80487F-page 4
Under certain circumstances, applying voltages
to the comparator inputs, C2INC and C2IND
(SOSCO/RA4 and SOSCI/RB4, respectively),
may cause the microcontroller’s current draw to
increase. This happens only when all of the
following conditions are met:
•
•
•
This occurs regardless of the signal source. A
comparator input voltage or a digital clock input
of sufficient amplitude will have the same result.
Work around
If it is necessary to use RA4 and RB4 as com-
parator inputs, C2INC and C2IND, program the
SOSCEL Configuration bits (CW3<9:8>) for one
of the oscillator modes (SOSCEL<1:0> = 11 or
01), rather than as digital I/O.
In addition, use the internal 31 kHz RC Oscillator
(LPRC) as the clock source for any systems that
might otherwise use the Secondary Oscillator or
an external Timer1 source. In addition to Timer1,
this includes the RTCC and the Deep Sleep
WDT.
Affected Silicon Revisions
When operating in Enhanced Buffer Master mode,
the module may transmit two bytes or two words of
data, with a value of 0h, immediately upon the
microcontroller waking up from Sleep mode. At the
same time, the module “receives” two words or two
bytes of data, also with the value of 0h.
The transmission of null data occurs even if the
Transmit Buffer registers are empty prior to the
microcontroller
received null data requires that the receive buffer
be read twice to clear the “received” data.
This behavior has not been observed when the
module is operating in any other mode.
A2
X
RA4 and RB4 are configured to function as
digital I/O, rather than as Secondary
Oscillator pins (SOSCEL<1:0> = 00);
the pins are configured as digital inputs
(TRIS<4> and TRISB<4> = 1); and
the voltage applied to the pins approaches
1/2 V
DD
Configuration)
.
entering
Sleep
mode.
The
8. Module: SPI (Master Mode)
Work around
When operating in Enhanced Buffer Master
mode, disable the module (SPIEN = 0) before
entering Sleep mode.
Affected Silicon Revisions
When operating in Enhanced Buffer Master mode,
the Transmit Buffer Full flag, SPITBF, may be
cleared before all data in the FIFO buffer has
actually been set. This may result in data being
overwritten before it can be sent.
This has only been observed when the SPI clock
prescalers are configured for a divider of greater
than 1:4.
This behavior has not been observed when the
module is operating in any other mode.
Work around
Several options are available:
•
•
•
Affected Silicon Revisions
A2
A2
X
X
If possible, use a total clock prescale factor
of 1:4 or less.
Do not use SPITBF to indicate when new
data can be written to the buffer. Instead,
use the SPIRBF or SPIBEC flags to track
the number of bytes actually transmitted.
If the SPITBF flag must be used, always
wait at least one-half SPI clock cycle before
writing to the transmit buffer.
 2010 Microchip Technology Inc.