PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 6

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44

PIC24FJ64GB004-I/ML

Manufacturer Part Number
PIC24FJ64GB004-I/ML
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
16 Bit
Program Memory Size
64 KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GB004-I/ML
Manufacturer:
MICROCHIP
Quantity:
1 200
PIC24FJ64GB004
13. Module: Interrupts (INTx)
DS80487F-page 6
Writing to the INTCON2 register may cause an
external interrupt event (inputs on INT0 through
INT2) to be missed. This only happens when the
interrupt event and the write event occur during
the same clock cycle.
Work around
If this cannot be avoided, write the data intended
for INTCON2 to any other register in the inter-
rupt block of the SFR (addresses 0080h to
00E0h); then write the data to INTCON2.
Be certain to write the data to a register not
being actively used by the application, or to any
of the interrupt flag registers, in order to avoid
spurious interrupts. For example, if the inter-
rupts controlled by IEC4 are not being used in
the application, the code sequence would be:
IEC4 = 0x1E;
INTCON2 = 0x1E;
IEC4 = 0;
It is the user’s responsibility to determine an
appropriate register for the particular application.
Affected Silicon Revisions
A2
X
14. Module: Oscillator
15. Module: A/D Converter
The POSCEN bit (OSCCON<2>) has no effect
when a Primary Oscillator with PLL mode is
selected (COSC<2:0> = 011). If XTPLL, HSPLL
or ECPLL Oscillator mode are selected, and the
device enters Sleep mode, the Primary Oscilla-
tor will be disabled, regardless of the state of the
POSCEN bit.
XT, HS and EC Oscillator modes (without the
PLL) will continue to operate as expected.
Work around
None.
Affected Silicon Revisions
Once
(AD1CON1<15> = 1), it may continue to draw
extra current, even if the module is later disabled
(AD1CON1<15> = 0).
Work around
In addition to disabling the module through the
ADON bit, set the corresponding PMD bit
(ADC1MD, PMD1<0>) to power it down
completely.
Disabling the A/D module through the PMD reg-
ister also disables the AD1PCFG registers,
which in turn, affects the state of any port pins
with analog inputs. Users should consider the
effect on I/O ports and other digital peripherals
on those ports when ADC1MD is used for power
conservation.
Affected Silicon Revisions
A2
A2
X
X
the
A/D
 2010 Microchip Technology Inc.
module
is
enabled

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