PIC32MX360F256L-80I/BG Microchip Technology, PIC32MX360F256L-80I/BG Datasheet - Page 10
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PIC32MX360F256L-80I/BG
Manufacturer Part Number
PIC32MX360F256L-80I/BG
Description
IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.MA320002.pdf
(208 pages)
2.DM320001.pdf
(44 pages)
3.PIC32MX320F032H-40IPT.pdf
(48 pages)
4.PIC32MX320F032H-40IPT.pdf
(66 pages)
5.PIC32MX320F032H-40IPT.pdf
(22 pages)
6.PIC32MX320F064H-40IMR.pdf
(172 pages)
Specifications of PIC32MX360F256L-80I/BG
Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
No. Of Pwm Channels
5
Core Size
32 Bit
Program Memory Size
256 KB
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC32MX3xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EUART, I2C, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX360F256L-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC32MX3XX/4XX
21. Module: Input Capture
22. Module: USB
DS80440D-page 10
16-bit DMA transfers from the ICAP module FIFO
buffer do not advance the ICAP FIFO pointer. This
results in the entire DMA output buffer being filled
with the first value from the ICAP FIFO.
Work around
Configure the DMA to perform 32-bit transfers
from the ICAP FIFO.
Affected Silicon Revisions
The USB module does not correctly switch from
full-speed to low-speed after sending a PRE
packet to a hub.
Work around
Connect a low-speed device directly to the PIC32.
Affected Silicon Revisions
B2
B2
X
X
B3
B3
X
X
B4
B4
X
X
B6
B6
X
X
23. Module: DMA
24. Module: PMP
The DMA buffer may be erroneously filled with the
last data read prior to the breakpoint. This buffer fill
will continue until the DMA buffer is full. However,
the DMA buffer fills correctly if those same
peripherals are used as DMA destinations, even
when the CPU goes into Debug Exception mode.
This behavior occurs when the DMA controller is
actively transferring data and a debugger hits a
breakpoint, causes a single-step operation, or
halts the target.
Refer to
input registers that could affect DMA buffer usage.
TABLE 3: REGISTERS AND
Work around
If the debugger halts during a DMA transfer from
one of these registers, either ignore the DMA
transferred data or restart the debug session.
Affected Silicon Revisions
Events can be missed if the PMDIN register is
used as the DMA source or destination and the
PMP IRQ is used as the DMA trigger.
Work around
Do not use DMA for PMP read or write operations.
Affected Silicon Revisions
B2
B2
X
X
Peripheral as DMA
Change Notice
Input Capture
B3
B3
X
X
Source
Table
UART
PMP
SPI
PERIPHERALS AFFECTED BY
BREAKPOINTS DURING DMA
TRANSFERS
B4
B4
X
X
3, which lists the peripherals and
© 2010 Microchip Technology Inc.
B6
B6
X
X
Input Register
Transfer from
UxRXREG
SPIxBUF
ICxBUF
PORTx
PMDIN