PIC32MX440F128L-80I/BG Microchip Technology, PIC32MX440F128L-80I/BG Datasheet - Page 167
![IC, 32BIT MCU, PIC32, 80MHZ, BGA-100](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX440F128L-80I/BG
Manufacturer Part Number
PIC32MX440F128L-80I/BG
Description
IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.MA320002.pdf
(208 pages)
2.DM320001.pdf
(44 pages)
3.PIC32MX320F032H-40IPT.pdf
(48 pages)
4.PIC32MX320F032H-40IPT.pdf
(66 pages)
5.PIC32MX320F032H-40IPT.pdf
(22 pages)
6.PIC32MX320F064H-40IMR.pdf
(172 pages)
Specifications of PIC32MX440F128L-80I/BG
Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI, USB
No. Of Pwm Channels
5
Core Size
32 Bit
Program Memory Size
128 KB
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Embedded Interface Type
EUSART, I2C, SPI, USB
Rohs Compliant
Yes
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EUART, I2C, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX440F128L-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
APPENDIX A: REVISION HISTORY
Revision E (July 2008)
• Updated the PIC32MX340F128H features in
TABLE A-1:
© 2009 Microchip Technology Inc.
“High-Performance 80 MHz MIPS-
Based 32-bit Flash Microcontroller
64/100-Pin General Purpose and
USB”
Section 1.0 “Device Overview”
Section 2.0 “Guidelines for Getting
Started with 32-bit Microcontrollers”
Section 4.0 “Memory Organization”
Section 7.0 “Interrupt Controller”
Section 12.0 “I/O Ports”
Section 26.0 “Special Features”
Table 1 to include 4 programmable DMA
channels.
Section Name
MAJOR SECTION UPDATES
Added a Packages” column to Table 1 and Table 2.
Corrected all pin diagrams to update the following pin names.
Previous:
PGC!/EMUC1
PGD!/EMUD1
PGC2/EMUC2
PGD2/EMUD2
Shaded appropriate pins in each diagram to indicate which pins are 5V tol-
erant.
Added 64-Lead QFN package pin diagrams, one for General Purpose and
one for USB.
Reconstructed Figure 1-1 to include Timers, ADC, and RTCC in the block
diagram.
Added a new section to the data sheet that provides the following informa-
tion:
• Basic Connection Requirements
• Capacitors
• Master Clear PIN
• ICSP Pins
• External Oscillator Pins
• Configuration of Analog and Digital Pins
• Unused I/Os
Updated the memory maps, Figure 4-1 through Figure 4-6.
All summary peripheral register maps were relocated to Section 4.0
“Memory Organization” .
Removed the “Address” column from Table 7-1.
Added a second paragraph to Section 12.1.3 “Analog Inputs” to clarify
that all pins that share ANx functions are analog by default, because the
AD1PCFG register has a default value of 0x0000.
Modified bit names and locations in Register 26-5 “DEVID: Device and
Revision ID Register” .
Replaced “T
in Section 26.3.1 “On-Chip Regulator and POR” .
The information that appeared in the Watchdog Timer and the Program-
ming and Diagnostics sections of 61143E version of this data sheet has
been incorporated into the Special Features section:
Section 26.2 “Watchdog Timer (WDT)”
Section 26.4 “Programming and Diagnostics”
Preliminary
STARTUP
Revision F (June 2009)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
Global changes include:
• Changed all instances of OSCI to OSC1 and
• Changed all instances of V
• Deleted registers in most sections, refer to the
The other changes are referenced by their respective
section in the following table.
” with “T
OSCO to OSC2
V
related section of the PIC32MX3XX/4XX Family
Reference Manual (DS61132).
DDCORE
Update Description
Current:
PGEC1
PGED1
PGEC2
PGED2
PU
PIC32MX3XX/4XX
”, and “64-ms nominal delay” with “T
/V
CAP
to V
CAP
/V
DDCORE
DDCORE
DS61143F-page 165
and
PWRT
”,