PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 359

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PIC18F85K22-I/PT

Manufacturer Part Number
PIC18F85K22-I/PT
Description
IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F85K22-I/PT

Controller Family/series
PIC18
No. Of I/o's
69
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
64MHz
No. Of Timers
8
Core Size
8 Bit
Program Memory Size
32KB
Core Processor
PIC
Speed
64MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
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Quantity
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Microchip Technology
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Manufacturer:
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REGISTER 23-10: ANCON2: A/D PORT CONFIGURATION REGISTER 2
The analog reference voltage is software-selectable to
either the device’s positive and negative supply voltage
(AV
RA3/AN3/V
two additional Internal Reference Voltage selections:
2.048V and 4.096V.
The A/D Converter can uniquely operate while the
device is in Sleep mode. To operate in Sleep, the A/D
conversion clock must be derived from the A/D
Converter’s internal RC oscillator.
The output of the Sample-and-Hold (S/H) is the input
into the converter, which generates the result via
successive approximation.
 2009-2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
ANSEL23
DD
R/W-1
and AV
(1)
REF
AN15 through AN12 and AN23 through AN20 are implemented only on 80-pin devices. For 64-pin
devices, the corresponding ANSELx bits are still implemented for these channels, but have no effect.
+ and RA2/AN2/V
ANSEL<23:16>: Analog Port Configuration bits (AN23 through AN16)
1 = Pin is configured as an analog channel; digital input is disabled and any inputs read as ‘ 0 ’
0 = Pin is configured as a digital port
ANSEL22
SS
R/W-1
) or the voltage level on the
(1)
W = Writable bit
‘1’ = Bit is set
ANSEL21
REF
R/W-1
- pins. V
(1)
REF
ANSEL20
R/W-1
+ has
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K22 FAMILY
ANSEL19
R/W-1
Each port pin associated with the A/D Converter can be
configured as an analog input or a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH:ADRESL
register pair, the GO/DONE bit (ADCON0<1>) is
cleared and the A/D Interrupt Flag bit, ADIF (PIR1<6>),
is set.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted. The value in the
ADRESH:ADRESL register pair is not modified for a
Power-on Reset. These registers will contain unknown
data after a Power-on Reset.
The block diagram of the A/D module is shown in
Figure
23-4.
ANSEL18
R/W-1
(1)
x = Bit is unknown
ANSEL17
R/W-1
DS39960D-page 359
ANSEL16
R/W-1
bit 0

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