PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 90

• Manufacturer Part Number: PIC18F85K22-I/PT
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F85K22-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 69
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Core Size: 8 Bit
• Program Memory Size: 32KB
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
6.1.3.2
The STKPTR register
Pointer value, the STKFUL (Stack Full) status bit and
the STKUNF (Stack Underflow) status bits. The value
of the Stack Pointer can be 0 through 31. The Stack
Pointer increments before values are pushed onto the
stack and decrements after values are popped off the
stack. On Reset, the Stack Pointer value will be zero.
The user may read and write the Stack Pointer value.
This feature can be used by a Real-Time Operating
System (RTOS) for return stack maintenance.
After the PC is pushed onto the stack 31 times (without
popping any values off the stack), the STKFUL bit is
set. The STKFUL bit is cleared by software or by a
POR.
What happens when the stack becomes full depends
on the state of the STVREN (Stack Overflow Reset
Enable) Configuration bit. (For a description of the
device Configuration bits, see
ration
will push the (PC + 2) value onto the stack, set the
STKFUL bit and reset the device. The STKFUL bit will
remain set and the Stack Pointer will be set to zero.
If STVREN is cleared, the STKFUL bit will be set on the
31st push and the Stack Pointer will increment to 31.
Any additional pushes will not overwrite the 31st push
and the STKPTR will remain at 31.
REGISTER 6-1:
DS39960D-page 90
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-0
Note 1:
STKFUL
R/C-0
Bits”.) If STVREN is set (default), the 31st push
(1)
Bit 7 and bit 6 are cleared by user software or by a POR.
Return Stack Pointer (STKPTR)
STKFUL: Stack Full Flag bit
1 = Stack has become full or overflowed
0 = Stack has not become full or overflowed
STKUNF: Stack Underflow Flag bit
1 = Stack underflow has occurred
0 = Stack underflow did not occur
Unimplemented: Read as ‘0’
SP<4:0>: Stack Pointer Location bits
STKUNF
R/C-0
(Register
STKPTR: STACK POINTER REGISTER
(1)
Section 28.1 “Configu-
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
6-1) contains the Stack
U-0
—
(1)
R/W-0
SP4
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
When the stack has been popped enough times to
unload the stack, the next pop will return a value of zero
to the PC and set the STKUNF bit while the Stack
Pointer remains at zero. The STKUNF bit will remain
set until cleared by software or until a POR occurs.
6.1.3.3
Since the Top-of-Stack (TOS) is readable and writable,
the ability to push values onto the stack and pull values
off of the stack, without disturbing normal program exe-
cution, is a desirable feature. The PIC18 instruction set
includes two instructions, PUSH and POP, that permit
the TOS to be manipulated under software control.
TOSU, TOSH and TOSL can be modified to place data
or a return address on the stack.
The PUSH instruction places the current PC value onto
the stack. This increments the Stack Pointer and loads
the current PC value onto the stack.
The POP instruction discards the current TOS by
decrementing the Stack Pointer. The previous value
pushed onto the stack then becomes the TOS value.
SP3
Note:
Returning a value of zero to the PC on an
underflow has the effect of vectoring the
program to the Reset vector, where the
stack conditions can be verified and
appropriate actions can be taken. This is
not the same as a Reset as the contents
of the SFRs are not affected.
PUSH
R/W-0
SP2
 2009-2011 Microchip Technology Inc.
and
x = Bit is unknown
POP
R/W-0
SP1
Instructions
R/W-0
SP0
bit 0