PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 71
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PIC18F85K22-I/PT
Manufacturer Part Number
PIC18F85K22-I/PT
Description
IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F85K22-IPT.pdf
(550 pages)
Specifications of PIC18F85K22-I/PT
Controller Family/series
PIC18
No. Of I/o's
69
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
64MHz
No. Of Timers
8
Core Size
8 Bit
Program Memory Size
32KB
Core Processor
PIC
Speed
64MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F85K22-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F85K22-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
PIC18F85K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
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TABLE 4-4:
2009-2011 Microchip Technology Inc.
PRI_IDLE mode
SEC_IDLE mode
RC_IDLE mode
Sleep mode
Note 1:
Power-Managed
2:
3:
4:
5:
Mode
T
runs concurrently with any other required delays (see
Includes postscaler derived frequencies. On Reset, INTOSC defaults to HF-INTOSC at 8 MHz.
T
(Parameter F12,
Execution continues during T
The clock source is dependent upon the settings of the SCS (OSCCON<1:0>), IRCF (OSCCON<6:4>)
and FOSC (CONFIG1H<3:0>) bits.
CSD
OST
(Parameter 38,
is the Oscillator Start-up Timer (Parameter 32,
EXIT DELAY ON WAKE-UP BY RESET FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
Table
Table
31-7); it is also designated as T
Clock Source
HF-INTOSC
MF-INTOSC
HF-INTOSC
MF-INTOSC
HF-INTOSC
MF-INTOSC
LF-INTOSC
LF-INTOSC
LF-INTOSC
31-13) is a required delay when waking from Sleep and all Idle modes, and
LP, XT, HS
LP, XT, HS
IOBST
EC, RC
EC, RC
HSPLL
HSPLL
SOSC
(Parameter 39,
(2)
(2)
(2)
(2)
(2)
(2)
(5)
PIC18F87K22 FAMILY
Table
Table
Section 4.4 “Idle
PLL
31-13), the INTOSC stabilization period.
.
31-13). T
T
Exit Delay
OST
T
T
T
T
T
T
IOBST
CSD
CSD
CSD
CSD
OST
+ t
(1)
(1)
(1)
(3)
(1)
rc
(4)
RC
(3)
is the PLL Lock-out Timer
Modes”).
Clock Ready
Status Bits
SOSCRUN
MFIOFS
DS39960D-page 71
MFIOFS
MFIOFS
HFIOFS
HFIOFS
HFIOFS
OSTS
OSTS
None
None
None
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