AT80C51RD2-SLSUM Atmel, AT80C51RD2-SLSUM Datasheet - Page 8

• Manufacturer Part Number: AT80C51RD2-SLSUM
• Description: MCU, 8BIT, 8051, 5V, SPI, 20MHZ, 44PLCC
• Manufacturer: Atmel

Specifications of AT80C51RD2-SLSUM

• Controller Family/series: (8051) 8052
• No. Of I/o's: 32
• Ram Memory Size: 1280Byte
• Cpu Speed: 40MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 5
• Core Size: 8bit
• Oscillator Type: External Only
• Processor Series: AT80x
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Data Ram Size: 1280 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Cpu Family: AT80
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 40MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 1.25KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5. Oscillators
5.1
5.2
5.2.1
8
Overview
Registers
AT80C51RD2
Prescaler Divider
One oscillator is available for CPU:
In order to optimize the power consumption and the execution time needed for a specific task,
an internal prescaler feature has been implemented between the selected oscillator and the
CPU.
Table 5-1.
Reset Value = 1111 1111b
Not bit addressable
A hardware RESET puts the prescaler divider in the following state:
• OSC used for high frequency (3 MHz to 40 MHz)
• CKRL = FFh: F
• Any value between FFh down to 00h can be written by software into CKRL register in order to
Number
KS signal selects OSC: F
divide frequency of the selected oscillator:
7:0
Bit
7
-
– CKRL = 00h: minimum frequency
– CKRL = FFh: maximum frequency
– F
F
F
F
F
In X2 mode:
In X1 mode:
CLK CPU
CLK CPU
CLK CPU
CLK CPU
CLK CPU
Mnemonic
CKRL
Clock Reload Register
Bit
= F
= F
= F
= F
and F
6
-
CLK CPU
CLK PERIPH
CLK PERIPH
CLK PERIPH
CLK PERIPH
CLK PERIPH
Description
Clock Reload Register: Prescaler value
F
F
= F
CPU
CPU
CLK OUT
CLK PERIPH
5
-
= F
= F
= F
= F
=
=
F
F
OSC
OSC
OSC
OSC
CLKPERIPH
CLKPERIPH
= F
/1020 (Standard Mode)
/510 (X2 Mode)
/2 (Standard Mode)
(X2 Mode)
= F
OSC
4
-
OSC
=
=
/2 (Standard C51 feature)
--------------------------------------------- -
2
--------------------------------------------- -
4
×
×
(
(
255 CKRL
255 CKRL
F
F
OSCA
3
OSC
-
–
–
)
)
2
-
1
-
4113D–8051–01/09
0
-