LFXP2-17E-5QN208C8W LATTICE SEMICONDUCTOR, LFXP2-17E-5QN208C8W Datasheet - Page 49
![FPGA, 17K LUTS, 146 IO, DSP, 208PQFP](/photos/19/4/190400/ge208pqfp05-40_sml.jpg)
LFXP2-17E-5QN208C8W
Manufacturer Part Number
LFXP2-17E-5QN208C8W
Description
FPGA, 17K LUTS, 146 IO, DSP, 208PQFP
Manufacturer
LATTICE SEMICONDUCTOR
Series
LatticeXP2r
Datasheet
1.LFXP2-5E-5TN144C.pdf
(93 pages)
Specifications of LFXP2-17E-5QN208C8W
No. Of Macrocells
8500
Family Type
LatticeXP2
No. Of Speed Grades
5
No. Of I/o's
146
Clock Management
PLL
Core Supply Voltage Range
1.14V To 1.26V
I/o Supply
RoHS Compliant
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Lattice Semiconductor
Programming and Erase Flash Supply Current
I
I
I
I
I
1. For further information on supply current, please see TN1139, Power Estimation and Management for LatticeXP2 Devices.
2. Assumes all outputs are tristated, all inputs are configured as LVCMOS and held at the V
3. Frequency 0MHz (excludes dynamic power from FPGA operation).
4. A specific configuration pattern is used that scales with the size of the device; consists of 75% PFU utilization, 50% EBR, and 25% I/O con-
5. Bypass or decoupling capacitor across the supply.
6. T
7. In fpBGA and ftBGA packages the PLLs are connected to and powered from the auxiliary power supply. For these packages, the actual
8. When programming via JTAG.
CC
CCAUX
CCPLL
CCIO
CCJ
figuration.
auxiliary supply current is the sum of I
auxiliary power supply.
J
= 25°C, power supplies at nominal voltage.
Symbol
Core Power Supply Current
Auxiliary Power Supply Current
PLL Power Supply Current (per PLL)
Bank Power Supply Current (per Bank)
V
CCJ
Power Supply Current
Parameter
CCAUX
Over Recommended Operating Conditions
and I
CCPLL
8
7
. For csBGA, PQFP and TQFP packages the PLLs are powered independent of the
3-5
XP2-5
XP2-8
XP2-17
XP2-30
XP2-40
XP2-5
XP2-8
XP2-17
XP2-30
XP2-40
Device
1, 2, 3, 4, 5
DC and Switching Characteristics
CCIO
LatticeXP2 Family Data Sheet
or GND.
(25°C, Max. Supply)
Typical
0.1
17
21
28
36
50
64
66
83
87
88
14
5
6
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
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