DSPIC30F6013-20E/PF Microchip Technology, DSPIC30F6013-20E/PF Datasheet - Page 60
DSPIC30F6013-20E/PF
Manufacturer Part Number
DSPIC30F6013-20E/PF
Description
IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F6014-20IPF.pdf
(228 pages)
2.DSPIC30F6014-20IPF.pdf
(22 pages)
3.DSPIC30F6014-20IPF.pdf
(28 pages)
Specifications of DSPIC30F6013-20E/PF
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F601320EPF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6013-20E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
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dsPIC30F6011/6012/6013/6014
7.2
7.2.1
In order to erase a block of data EEPROM, the
NVMADRU and NVMADR registers must initially point
to the block of memory to be erased. Configure
NVMCON for erasing a block of data EEPROM, and
set the ERASE and WREN bits in the NVMCON
register. Setting the WR bit initiates the erase as
shown in Example 7-2.
EXAMPLE 7-2:
7.2.2
The NVMADRU and NVMADR registers must point to
the block. Select erase a block of data Flash, and set
the ERASE and WREN bits in the NVMCON register.
Setting the WR bit initiates the erase as shown in
Example 7-3.
EXAMPLE 7-3:
DS70117F-page 58
; Select data EEPROM block, ERASE, WREN bits
; Start erase cycle by setting WR after writing key sequence
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
; Select data EEPROM word, ERASE, WREN bits
; Start erase cycle by setting WR after writing key sequence
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
NOP
NOP
Erasing Data EEPROM
ERASING A BLOCK OF DATA
EEPROM
ERASING A WORD OF DATA
EEPROM
#0x4045,W0
W0
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
#0x4044,W0
W0
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
,
,
,
,
,
,
NVMCON
NVMKEY
NVMKEY
NVMCON
NVMKEY
NVMKEY
DATA EEPROM BLOCK ERASE
DATA EEPROM WORD ERASE
; Initialize NVMCON SFR
; Block all interrupts with priority <7 for
; next 5 instructions
;
; Write the 0x55 key
;
; Write the 0xAA key
; Initiate erase sequence
; Block all interrupts with priority <7 for
; next 5 instructions
;
; Write the 0x55 key
;
; Write the 0xAA key
; Initiate erase sequence
© 2006 Microchip Technology Inc.
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