PIC16F630-E/SL Microchip Technology, PIC16F630-E/SL Datasheet - Page 19

• Manufacturer Part Number: PIC16F630-E/SL
• Description: 14 PIN, 1.75KB STD FLASH, 64 RAM, 12 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F630-E/SL

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.3
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The high byte (PC<12:8>) is not
directly readable or writable and comes from PCLATH.
On any Reset, the PC is cleared. Figure 2-3 shows the
two situations for the loading of the PC. The upper
example in Figure 2-3 shows how the PC is loaded on
a write to PCL (PCLATH<4:0>  PCH). The lower
example in Figure 2-3 shows how the PC is loaded
during a CALL or GOTO instruction (PCLATH<4:3> 
PCH).
FIGURE 2-3:
2.3.1
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When perform-
ing a table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256-byte block). Refer to the
Application Note “Implementing a Table Read"
(AN556).
 2010 Microchip Technology Inc.
PC
PC
12
12 11 10
2
PCL and PCLATH
5
PCH
PCLATH<4:3>
PCH
COMPUTED GOTO
PCLATH
PCLATH<4:0>
8
PCLATH
8
7
7
LOADING OF PC IN
DIFFERENT SITUATIONS
PCL
PCL
11
8
0
0
Instruction with
PCL as
Destination
ALU Result
GOTO, CALL
Opcode <10:0>
2.3.2
The PIC16F630/676 family has an 8-level x 13-bit wide
hardware stack (see Figure 2-1). The stack space is
not part of either program or data space and the Stack
Pointer is not readable or writable. The PC is PUSHed
onto the stack when a CALL instruction is executed or
an interrupt causes a branch. The stack is POPed in
the event of a RETURN,
instruction execution. PCLATH is not affected by a
PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
Note 1: There are no Status bits to indicate Stack
2: There are no instructions/mnemonics
STACK
Overflow or Stack Underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW and RETFIE
instructions or the vectoring to an
interrupt address.
PIC16F630/676
RETLW or a RETFIE
DS40039F-page 19