PIC16F630-E/SL Microchip Technology, PIC16F630-E/SL Datasheet - Page 78

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PIC16F630-E/SL

Manufacturer Part Number
PIC16F630-E/SL
Description
14 PIN, 1.75KB STD FLASH, 64 RAM, 12 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F630-E/SL

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F630/676
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Description:
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS40039F-page 78
Move f
[ label ]
0  f  127
d  [0,1]
(f)  (destination)
Z
The contents of register f are
moved to a destination dependant
upon the status of d. If d = 0,
destination is W register. If d = 1,
the destination is file register f itself.
d = 1 is useful to test a file register,
since status flag Z is affected.
Move Literal to W
[ label ]
0  k  255
k  (W)
None
The eight-bit literal ‘k’ is loaded
into W register. The don’t cares
will assemble as 0’s.
Move W to f
[ label ]
0  f  127
(W)  (f)
None
Move data from W register to
register ‘f’.
MOVF f,d
MOVLW k
MOVWF
f
NOP
Syntax:
Operands:
Operation:
Status Affected:
Description:
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
No Operation
[ label ]
None
No operation
None
No operation.
Return from Interrupt
[ label ]
None
TOS  PC,
1  GIE
None
Return with Literal in W
[ label ]
0  k  255
k  (W);
TOS  PC
None
The W register is loaded with the
eight-bit literal ‘k’. The program
counter is loaded from the top of
the stack (the return address).
This is a two-cycle instruction.
 2010 Microchip Technology Inc.
NOP
RETFIE
RETLW k

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