PIC16F88-E/ML Microchip Technology, PIC16F88-E/ML Datasheet - Page 20

• Manufacturer Part Number: PIC16F88-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F88-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: SSP, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Details

PIC16F87/88
2.2.2.2
The OPTION_REG register is a readable and writable
register that contains various control bits to configure
the TMR0 prescaler/WDT postscaler (single assign-
able register known also as the prescaler), the external
INT interrupt, TMR0 and the weak pull-ups on PORTB.
REGISTER 2-2:
DS30487C-page 18
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
OPTION_REG Register
OPTION_REG: OPTION CONTROL REGISTER (ADDRESS 81h, 181h)
bit 7
RBPU
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RB0/INT pin
0 = Interrupt on falling edge of RB0/INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on RA4/T0CKI/C2OUT pin
0 = Internal instruction cycle clock (CLKO)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA4/T0CKI/C2OUT pin
0 = Increment on low-to-high transition on RA4/T0CKI/C2OUT pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
Legend:
R = Readable bit
-n = Value at POR
R/W-1
RBPU
Bit Value
000
001
010
011
100
101
110
111
:
PORTB Pull-up Enable bit
INTEDG
R/W-1
TMR0 Rate
1 : 128
1 : 256
1 : 16
1 : 32
1 : 64
1 : 2
1 : 4
1 : 8
R/W-1
T0CS
WDT Rate
W = Writable bit
‘1’ = Bit is set
1 : 128
1 : 16
1 : 32
1 : 64
1 : 1
1 : 2
1 : 4
1 : 8
R/W-1
T0SE
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
To achieve a 1:1 prescaler assignment for
the TMR0 register, assign the prescaler to
the Watchdog Timer. Although the pres-
caler can be assigned to either the WDT or
Timer0, but not both, a new divide counter
is implemented in the WDT circuit to give
multiple WDT time-out selections. This
allows TMR0 and WDT to each have their
own scaler. Refer to Section 15.12
“Watchdog Timer (WDT)” for further
details.
PSA
R/W-1
PS2
 2005 Microchip Technology Inc.
x = Bit is unknown
R/W-1
PS1
R/W-1
PS0
bit 0