L3G4200DTR STMicroelectronics, L3G4200DTR Datasheet - Page 21

• Manufacturer Part Number: L3G4200DTR
• Description: IC GYROSCOPE MEMS 3AXIS LP 16LGA
• Manufacturer: STMicroelectronics

Specifications of L3G4200DTR

• Package Type: LGA
• Operating Supply Voltage (min): 2.4V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 4mm
• Product Height (mm): 1.1mm
• Product Length (mm): 4mm
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-11071-2; L3G4200DTR

L3G4200D
5
5.1
Digital interfaces
The registers embedded in the L3G4200D may be accessed through both the I
serial interfaces. The latter may be software-configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pins. To select/exploit the I
CS line must be tied high (i.e., connected to Vdd_IO).
Table 11.
I
The L3G4200D I
content can also be read back.
The relevant I
Table 12.
There are two signals associated with the I
data line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface. Both lines must be connected to Vdd_IO through an external pull-up
resistor. When the bus is free both the lines are high.
The I
mode.
2
C serial interface
SDA/SDI/SDO
Transmitter
2
Pin name
SCL/SPC
Receiver
C interface is compliant with fast mode (400 kHz) I
Master
Term
Slave
SDO
CS
Serial interface pin description
I
2
2
C terminology
C terminology is given in the table below.
2
C is a bus slave. The I
SPI enable
I
communication mode / I
I
SPI serial port clock (SPC)
I
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
SPI serial data output (SDO)
I
The device which sends data to the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
The device addressed by the master
2
2
2
2
C/SPI mode selection (1:SPI idle mode / I
C serial clock (SCL)
C serial data (SDA)
C least significant bit of the device address
Doc ID 17116 Rev 3
2
C is employed to write data to registers whose
2
C disabled)
2
C bus: the serial clock line (SCL) and the serial
Pin description
Description
2
C standards as well as with normal
2
C communication enabled; 0: SPI
Digital interfaces
2
C interface, the
2
C and SPI
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