ACPL-C797-500E Avago Technologies US Inc., ACPL-C797-500E Datasheet - Page 12

Isolated Sigma-Delta, T/R+IEC+LF

ACPL-C797-500E

Manufacturer Part Number
ACPL-C797-500E
Description
Isolated Sigma-Delta, T/R+IEC+LF
Manufacturer
Avago Technologies US Inc.
Series
-r
Type
Sigma-Delta Modulatorr
Datasheet

Specifications of ACPL-C797-500E

Voltage - Isolation
5000Vrms
Input Type
DC
Voltage - Supply
3 V ~ 5.5 V, 4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.268", 6.81mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ACPL-C797-500E
Manufacturer:
AVAGO/安华高
Quantity:
20 000
Company:
Part Number:
ACPL-C797-500E
Quantity:
5 000
Digital Filter
A digital filter converts the single-bit data stream from
the modulator into a multi-bit output word similar to
the digital output of a conventional A/D converter. With
this conversion, the data rate of the word output is also
reduced (decimation). A Sinc
CURRENT
Note: In applications, 1PF//0.1PF bypass capacitors are recommended to connect between pins V
GND1, and between pins V
Figure 17. Typical application circuit with a Sinc
Digital Interface IC
The HCPL-0872 Digital Interface IC (SO-16 package) is a
digital filter that converts the single-bit data stream from
the modulator into 15-bit output words and provides a
serial output interface that is compatible with SPI
CURRENT
Figure 18. Typical application circuit with the HCPL-0872
12
INPUT
INPUT
R
R
SHUNT
SHUNT
ISOLATED
1 PF
ISOLATED
1 PF
GND1
GND1
5 V
5 V
0.1 PF
0.1 PF
DD2
and GND2 of the ACPL-C797.
V
V
V
GND1
V
V
V
GND1
DD1
IN+
IN–
DD1
IN+
IN–
3
ISOLATION
ISOLATION
ACPL-C797
ACPL-C797
BARRIER
BARRIER
filter is recommended to
3
filter
MDAT
MDAT
GND2
GND2
MCLK
MCLK
V
V
DD2
DD2
0.1
PF
0.1
PF
ISOLATED
5 V/3.3 V
ISOLATED
GND2
GND2
NON-
NON-
5 V
£
, QSPI
1
PF
1
PF
£
V
CLOCK
DATA
GND
V
MCLK1
MDAT1
GND
,
DD
DD
SINC
HCPL-0872
3
work together with the ACPL-C797. With 256 decimation
ratio and 16-bit word settings, the output data rate is 39
kHz (= 10 MHz/256). This filter can be implemented in an
ASIC, an FPGA or a DSP. Some of the ADC codes with cor-
responding input voltages are shown in Table 10.
and Microwire
microcontroller. Instead of a digital filter implemented in
software, the HCPL-0872 can be used together with the
ACPL-C797 to form an isolated programmable two-chip
A/D converter.
FILTER
SDAT
SDAT
SCLK
SCLK
CS
CS
£
3-WIRE
SERIAL
INTERFACE
3-WIRE
SERIAL
INTERFACE
protocols, allowing direct connection to a
DD1
and

Related parts for ACPL-C797-500E