IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 138

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

5–58
Video and Image Processing Suite User Guide
Algorithmic Description
This section describes how the algorithmic operations of the polyphase scaler can be
modelled using a frame-based method. This description shows how the filter kernel is
applied and how coefficients are loaded, but is not intended to indicate how the
hardware of the scaler is designed.
The filtering part of the polyphase scaler works by passing a windowed sinc function
over the input data. For up scaling, this function performs interpolation. For down
scaling, it acts as a low-pass filter to remove high-frequency data that would cause
aliasing in the smaller output image.
During the filtering process, the mid-point of the sinc function should be at the mid-
point of the pixel to output. This is achieved be applying a phase shift to the filtering
function.
If a polyphase filter has N
square filter.
Counting the coordinate space of the filter from the top-left corner, (0, 0), the mid-
point of the filter lies at ((N
output pixel at (i, j), the mid-point of the kernel is placed at ( in
in
difference between the real and integer solutions to these equations determines the
position of the filter function during scaling.
The filter function is positioned over the real solution by adjusting the function’s
phase:
The results of the vertical filtering are then found by taking the set of coefficients from
phase
then divided down to fit in the number of bits chosen for the horizontal kernel. The
horizontal kernel is applied to the coefficients from phase
This value is then divided down to the output bit width before being written out as a
result.
Choosing and Loading Coefficients
The filter coefficients, which the polyphase mode of the scaler uses, may be specified
at compile time or at run time. At compile time, the coefficients can be either selected
from a set of Lanczos-windowed sinc functions, or loaded from a comma-separated
variable (CSV) file.
At run time they are specified by writing to the Avalon-MM slave control port
(Table 7–17 on page
When the coefficients are read at run time, they are checked once per frame and
double-buffered so that they can be updated as the MegaCore function processes
active data without causing corruption.
Figure 5–27 on page 5–59
(usually referred to as Lanczos 2) would be sampled for a 4-tap vertical filter.
j
are calculated using the algorithmic description equations on
j
and applying them to each column in the square filter. Each of these N
7–13).
shows how a 2-lobe Lanczos-windowed sinc function
v
vertical taps and N
v
–1)/2, (N
phase
phase
i
j
=
=
--------------------------------------------------------- -
h
------------------------------------------------------ -
i
-1)/2). As in the bilinear case, to produce an
j
max w
max h
w
h
in
in
%w
%h
h
in
in
horizontal taps, the filter is a N
out
out
w
h
out
out
P
P
v
h
i
, to produce a single value.
Chapter 5: Functional Descriptions
January 2011 Altera Corporation
i
û, in
page
j
û) where in
5–55. The
h
results is
v
× N
i
Scaler
and
h