ASDL-3023-021 Avago Technologies US Inc., ASDL-3023-021 Datasheet - Page 5
![Infrared Transceivers SFF FIR+RC Front w/o Shield](/photos/26/70/267011/asdl-3023-021_wht_sml.jpg)
ASDL-3023-021
Manufacturer Part Number
ASDL-3023-021
Description
Infrared Transceivers SFF FIR+RC Front w/o Shield
Manufacturer
Avago Technologies US Inc.
Datasheet
1.ASDL-3023-021.pdf
(25 pages)
Specifications of ASDL-3023-021
Wavelength
885 nm, 875 nm
Continual Data Transmission
4 Mbit/s
Transmission Distance
30 cm
Radiant Intensity
50 mW/sr
Half Intensity Angle Degrees
15 deg
Pulse Width
4 us, 1.6 us
Maximum Rise Time
60 ns, 600 ns
Maximum Fall Time
60 ns, 600 ns
Led Supply Voltage
- 0.3 V to 6 V
Operating Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 25 C
Dimensions
7.5 mm x 2.75 mm x 1.75 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Recommended Application Circuit Components
Notes: CX1, CX2, CX3 & CX4 must be placed within 0.7cm of ASDL-3023
to obtain optimum noise immunity
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is ± 50°C/W.
5
Component
R
R
CX, CX, CX5
CX, CX4
Parameter
Storage Temperature
Operating Temperature
LED Anode Voltage
Supply Voltage
Input Voltage : TXD, SD/Mode
Output Voltage : RXD
Peak IR LED Current
Peak RC LED Current
CAUTION: The CMOS INhereNT TO The deSIgN Of ThIS COMpONeNT INCreASeS The COMpONeNT’S SUSCepTIbIlITy TO
dAMAge frOM eleCTrOSTATIC dISChArge (eSd). IT IS AdvISed ThAT NOrMAl STATIC preCAUTIONS be TAkeN IN hANdlINg
ANd ASSeMbly Of ThIS COMpONeNT TO preveNT dAMAge ANd/Or degrAdATION whICh MAy be INdUCed by eSd
Recommended Value
4.7W,±5%, 0.5 watt for Vcc ≤ .0V
.7W, for .4 ≤ VLED ≤ .7V;
.W, for .7 <VLED ≤ .0V
.9W, for .0 <VLED ≤ .V
4.7W, for . <VLED ≤ .6V
5.6W, for .6 <VLED ≤ 4.V
0W, for 4. <VLED ≤ 5V
00 nF, ± 0%, X7R Ceramic
4.7mF, ± 0%, Tantalum
Symbol
T
T
V
V
V
V
I
I
IRLED (PK)
RCLED(PK)
S
A
LEDA
CC
I
O
Min.
-40
-5
-0.
-0.
-0.
-0.
Note
Max.
+00
+85
6.5
6
5.5
5.5
00
00
Units
°C
°C
V
V
V
V
mA
mA
Conditions
≤ 5% duty cycle, ≤ 90 ms pulse width
≤ 0% duty cycle, ≤ 90 ms pulse width
Ref
Fig
Fig 4