71M6521FEIM-DB Maxim Integrated Products, 71M6521FEIM-DB Datasheet - Page 96

• Manufacturer Part Number: 71M6521FEIM-DB
• Description: Power Management Modules & Development Tools 71M6521FE DEMO BOARD M6521FE DEMO BOARD
• Manufacturer: Maxim Integrated Products

Specifications of 71M6521FEIM-DB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The biggest issue when moving code from the 6511/6513 to the 71M6521 is the reduced program memory. While the
71M6511 and 6513 have 64K, the 6521 has 32K, 16K and 8K versions. The standard 6521 CE code has 414 bytes,
and takes up space in flash. In order to make the code fit, and reduce the risk of running out of memory, TERIDIAN’s
firmware engineers coded to a space budget, and adopted a coding standard that permits entire features to be added
and removed easily. This method proved to be very useful when there were changes of scope in one or another version
of the demonstration firmware.
Another difference between 71M6511/6513 and the 71M6521 is that the CE code now resides in the flash. It is not
copied to the CE program RAM as in the 71M651X chips. Instead, the register CE_LCTN, bits 0…4 at XDATA 0x20A8
is set to the most significant 5 bits of the program flash address where the CE program resides. It is best to place the
CE program within the first 8Kbytes, so that the program design adapts easily to the three size variants of the chip.
Since the CE resides in flash memory, there are safeguards that prevent the CE program memory from being erased or
reprogrammed while the CE is running. When programming flash memory, the CE must first be disabled, then the code
must wait until the CE is halted. Only then, programming of the flash memory can occur.
Should there be an attempt to modify flash memory while the CE is running, the FWCOL0 and FWCOL1 interrupt bits
are set. If the interrupt is enabled, recovery action can occur. TSC’s demo firmware has not found a use for the
FWCOL interrupts.
One of the most significant innovations for the 71M6521 is the battery-power feature. This feature provides three
operational modes, that apply when the supply voltage is removed and the chip is powered by the battery. The
operation modes and their transitions are shown in Figure 5-26.
In the brownout mode, operation continues at 32kHz, and RAM and DIO pins remain powered. However, the clock
slows down and is so slow that the timers and serial port give dramatically different timings. Only the RTC, and its 1-
second interrupt run at an unchanged speed.
In addition to the flags given in Figure 5-26, the following considerations apply to state transitions:
The sleep and LCD modes shut down all of the 71M6521’s internal and XDATA RAM, as well as the pin drivers for
DIOs, and many of the memory cells that store the hardware configuration.
In particular, the meter should be designed so that the DIO pins and serial port outputs do not need to be powered in
battery modes.
The data sheet for the 71M6521 shows which bits are reset, and which are maintained in the battery modes.
The transitions between the modes are managed by changes in supply voltage, transitions of the push button pin
signal, and a wake-up timer.
The push-button operation is very simple: Pressing the button wakes the part from LCD or sleep mode into brownout
mode. Afterward, a bit is set: IE_PB, bit 4 of IFLAGS, SFR E8.
One of the characteristics of the 71M6521 is that it is not able to enter LCD or sleep mode if IE_PB or IE_WAKE (the
wake timer’s bit, see below) are set. The Demo Code clears these bits at the earliest convenient instant, transferring
their state to bits in the demo firmware’s status variable. This technique preserves data about how the chip last woke,
but also permits the chip to transition to the LCD and sleep modes easily.
Revision 1.7
5.17 PORTING 71M6511/6513 CODE TO THE 71M6521
5.17.1
5.17.2
5.17.3
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•
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Mission to brownout mode: The MPU keeps running, but the clock slows down.
Brownout to mission mode: The MPU keeps running, but the clock speeds up.
LCD or sleep mode to brownout mode: The MPU will start code execution at address 0x000.
Memory Use
CE Code Location
Battery Modes
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
TERIDIAN Proprietary
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