71M6512-DB Maxim Integrated Products, 71M6512-DB Datasheet - Page 119
71M6512-DB
Manufacturer Part Number
71M6512-DB
Description
Power Management Modules & Development Tools 71M6512 DEMO BOARD 71M6512 DEMO BOARD
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6521DE-DB.pdf
(138 pages)
- Current page: 119 of 138
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71M652X Software User’s Guide
The 80515 MPU is composed of four components:
The 80515 MPU allows instruction fetch from program memory and instruction execution using RAM or SFR. The
following chapter describes the main MPU registers.
ACC is the accumulator register. Most instructions use the accumulator to hold the operand. The mnemonics for
accumulator-specific instructions refer to accumulator as “A”, not ACC.
The B register is used during multiply and divide instructions. It can also be used as a scratch-pad register to hold
temporary data.
Revision 1.7
6.3.2 80515 MPU
PSW.7
PSW.5
PSW.4
PSW.3
PSW.2
PSW.1
PSW.0
Psw.6
Bit
Accumulator
The B Register
Program Status Word (PSW)
1.
2.
3.
4.
MSB
CV
Control unit
Arithmetic-logic unit
Memory control unit
RAM and SFR control unit
Symbol
RS1
RS0
OV
CV
AC
F0
P
-
AC
Function
Carry flag
Auxiliary Carry flag for BCD operations
General purpose Flag 0 available for user
Register bank select control bits. The contents of rs1 and rs0 select the working
register bank as follows:
(0, 0): Bank 0 (0x00-0x07)
(0,1): Bank 1 (0x08-0x0F)
(1, 0): Bank 2 (0x10-0x17)
(1, 1): Bank 3 (0x18-0x1F)
Overflow flag
User defined flag
Parity flag, affected by hardware to indicate odd / even number of “one” bits in the
Accumulator, i.e. even parity.
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
F0
Table 6-18: PSW Register Flags
Table 6-19: PSW Bit Functions
TERIDIAN Proprietary
RS1
RS
OV
-
P
LSB
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