71M6512-DB Maxim Integrated Products, 71M6512-DB Datasheet - Page 125
71M6512-DB
Manufacturer Part Number
71M6512-DB
Description
Power Management Modules & Development Tools 71M6512 DEMO BOARD 71M6512 DEMO BOARD
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6521DE-DB.pdf
(138 pages)
- Current page: 125 of 138
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71M652X Software User’s Guide
Revision 1.7
6.3.3.1
S1CON.7
S1CON.5
S1CON.4
S1CON.3
S1CON.2
S1CON.1
S1CON.0
Serial 0 modes 1 and 3 only (Fclk = MPU clock rate):
Serial 1 all modes: (Fclk = MPU clock rate):
Timer1 baud rate generator (WDCON.7 = 0)
baudrate
Internal baud rate generator (WDCON.7 = 1)
Note: s0rel is a 10 bit value formed by concatenating S0RELH and S0RELL as follows:
Internal baud rate generator only
Note: s1rel is a 10 bit value formed by concatenating S1RELH and S1RELL as follows:
baudrate
baudrate
Bit
Baud Rate generator
s0rel = {S0RELH.[1:0], S0RELL.[7:0]}
s1rel = {S1RELH.[1:0], S1RELL.[7:0]}
=
=
=
Symbol
384
64
32
SM21
REN1
RB81
TB81
SM
RI1
TI1
F
⋅
⋅
F
2 (
2 (
⋅
clk
clk
(
256
10
10
F
⋅
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
⋅
2
clk
2
−
−
s
s
mod
−
s
s
mod
Enables the multiprocessor communication feature (see description
The 9
Function
Sets baud rate
above).
If set, enables serial reception. Cleared by software to disable reception.
depending on the function it performs (parity check, multiprocessor
communication etc.)
In Modes 2 and 3, it is the 9
rb81 is the stop bit. In Mode 0 this bit is not used. Must be cleared by
software
Transmit interrupt flag, set by hardware after completion of a serial
transfer. Must be cleared by software.
Receive interrupt flag, set by hardware after completion of a serial
reception. Must be cleared by software
1
0
th
rel
rel
Table 6-32: The S1CON Bit Functions
) 1
)
)
th
transmitted data bit in Mode A. Set or cleared by the MPU,
TERIDIAN Proprietary
th
data bit received. In Mode B, if sm21 is 0,
125 of 138
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