LPD-SOM-CLIP1 Logic, LPD-SOM-CLIP1 Datasheet - Page 24

• Manufacturer Part Number: LPD-SOM-CLIP1
• Description: CLIP RETENTION PLATE
• Manufacturer: Logic

Specifications of LPD-SOM-CLIP1

• Accessory Type: Retention Clip
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: SOM-M1
• Other names: 460-3502

J1 Pin# SOM Net Name
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
PN 1013755 Rev 5
uP_VPIF_DOUT12
uP_VPIF_DOUT4
uP_VPIF_DOUT13
uP_VPIF_DOUT5
uP_VPIF_DOUT14
uP_VPIF_DOUT6
uP_VPIF_DOUT15
uP_VPIF_DOUT7
uP_LCD_HSYNC
uP_LCD_PCLK
DGND
DGND
uP_LCD_VSYNC
uP_LCD_MCLK
uP_LCD_AC_ENB_C
Sn
Logic Product Development Company, All Rights Reserved
PRELIMINARY DOCUMENT—SUBJECT TO CHANGE
Processor Name
VP_DOUT[12]/
LCD_D[12]/
UPP_XD[4]/
GP7[4]/ BOOT[4]
VP_DOUT[4]/
LCD_D[4]/
UPP_XD[12]/
GP7[12]
VP_DOUT[13]/
LCD_D[13]/
UPP_XD[5]/
GP7[5]/ BOOT[5]
VP_DOUT[5]/
LCD_D[5]/
UPP_XD[13]/
GP7[13]
VP_DOUT[14]/
LCD_D[14]/
UPP_XD[6]/
GP7[6]/ BOOT[6]
VP_DOUT[6]/
LCD_D[6]/
UPP_XD[14]/
GP7[14]
VP_DOUT[15]/
LCD_D[15]/
UPP_XD[7]/
GP7[7]/ BOOT[7]
VP_DOUT[7]/
LCD_D[7]/
UPP_XD[15]/
GP7[15]
MMCSD1_DAT[5]/
LCD_HSYNC/
GP8[9]
MMCSD1_DAT[7]/
LCD_PCLK/
GP8[11]
—
—
MMCSD1_DAT[4]/
LCD_VSYNC/
GP8[8]
MMCSD1_DAT[6]/
LCD_MCLK/
GP8[10]
LCD_AC_ENB_C
S/ GP6[0]
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
I/O Voltage
I
I
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1) —
3.3V or 1.8V
(see Note 1) 22 ohm series R on SOM.
GND
GND
3.3V or 1.8V
(see Note 1) —
3.3V or 1.8V
(see Note 1) 22 ohm series R on SOM.
3.3V or 1.8V
(see Note 1) —
OMAP-L138 SOM-M1 Hardware Specification
Description
LCD_R2 data bit when outputting RGB565
data to an RGB666 display.
4.7k pull-down on SOM.
Used to latch boot mode at startup (see
Note 2).
LCD_B5 data bit when outputting RGB565
data to an RGB666 display. Notice that
LCD_B0 is omitted; LCD_B5 (Blue MSB) is
also connected to LCD_B0 (Blue LSB)
when driving an 18 bit display with 16 bits.
LCD_R3 data bit when outputting RGB565
data to an RGB666 display.
4.7k pull-down on SOM.
Used to latch boot mode at startup (see
Note 2).
LCD_G0 data bit when outputting RGB565
data to an RGB666 display.
LCD_R4 data bit when outputting RGB565
data to an RGB666 display.
4.7k pull-down on SOM.
Used to latch boot mode at startup (see
Note 2).
LCD_G1 data bit when outputting RGB565
data to an RGB666 display.
LCD_R5 data bit when outputting RGB565
data to an RGB666 display. Notice that
LCD_R0 is omitted; LCD_R5 (Red MSB) is
also connected to LCD_R0 (Red LSB)
when driving an 18 bit display with 16 bits.
4.7k pull-down on SOM.
Used to latch boot mode at startup (see
Note 2).
LCD_G2 data bit when outputting RGB565
data to an RGB666 display.
Ground. Connect to digital ground.
Ground. Connect to digital ground.
19