PUMD3 /T2 NXP Semiconductors, PUMD3 /T2 Datasheet - Page 3

Digital Transistors TRANS RET DOUBLE TAPE-11 REV

PUMD3 /T2

Manufacturer Part Number
PUMD3 /T2
Description
Digital Transistors TRANS RET DOUBLE TAPE-11 REV
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PUMD3 /T2

Configuration
Dual
Transistor Polarity
NPN/PNP
Typical Input Resistor
10 KOhms
Typical Resistor Ratio
1
Mounting Style
SMD/SMT
Package / Case
SOT-363-6
Collector- Emitter Voltage Vceo Max
50 V
Peak Dc Collector Current
100 mA
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PUMD3,165
NXP Semiconductors
5. Limiting values
PEMD3_PIMD3_PUMD3_10
Product data sheet
Table 6.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
[3]
Symbol
Per transistor; for the PNP transistor with negative polarity
V
V
V
V
I
I
P
T
T
T
Per device
P
O
CM
stg
j
amb
CBO
CEO
EBO
I
tot
tot
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Device mounted on an FR4 PCB with 65 μm copper strip line, standard footprint.
Reflow soldering is the only recommended soldering method.
Limiting values
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage TR1
input voltage TR2
output current (DC)
peak collector current
total power dissipation
storage temperature
junction temperature
ambient temperature
total power dissipation
positive
negative
positive
negative
SOT363
SOT457
SOT666
SOT363
SOT457
SOT666
Rev. 10 — 15 November 2009
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
Conditions
open emitter
open base
open collector
T
T
PEMD3; PIMD3; PUMD3
amb
amb
≤ 25 °C
≤ 25 °C
[1][3]
[1][3]
[1]
[2]
[1]
[2]
Min
-
-
-
-
-
-
-
-
-
-
-
-
−65
-
−65
-
-
-
© NXP B.V. 2009. All rights reserved.
50
50
10
100
150
Max
+40
−10
+10
−40
100
200
300
200
+150
+150
300
600
300
Unit
V
V
V
V
V
V
V
mA
mA
mW
mW
mW
°C
°C
°C
mW
mW
mW
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