ADF7020-1BCPZ-RL7 Analog Devices Inc, ADF7020-1BCPZ-RL7 Datasheet - Page 23

• Manufacturer Part Number: ADF7020-1BCPZ-RL7
• Description: IC,RF Modulator/Demodulator,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of ADF7020-1BCPZ-RL7

• Design Resources: Low power, Long Range, ISM Wireless Measuring Node (CN0164)
• Frequency: 431MHz ~ 478MHz and 862MHz ~ 956MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: ASK, FSK
• Applications: Data Transfer, RKE, Remote Control/Security Systems
• Power - Output: -16dBm ~ 13dBm
• Sensitivity: -119dBm
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Receiving: 17.6mA
• Current - Transmitting: 21mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF7020-1DBZ8 - BOARD EVAL ADF7020-1 128-142MHZEVAL-ADF7020-1DBZ7 - BOARD EVAL ADF7020-1 310-340MHZEVAL-ADF7020-1DBZ6 - BOARD EVAL ADF7020-1 470-510MHZEVAL-ADF7020-1DBZ4 - BOARD EVAL ADF7020-1 405-435MHZEVAL-ADF7020-1DBZ5 - BOARD EVAL ADF7020-2 ADJ FREQ
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

LINEAR FSK DEMODULATOR
Figure 32 shows a block diagram of the linear FSK demodulator.
This method of frequency demodulation is useful when very
short preamble length is required and the system protocol
cannot support the overhead of the settling time of the internal
feedback AFC loop settling.
A digital frequency discriminator provides an output signal that
is linearly proportional to the frequency of the limiter outputs.
The discriminator output is then filtered and averaged using a
combined averaging filter and envelope detector. The demodu-
lated FSK data is recovered by comparing the filter output with
its average value, as shown in Figure 32. In this mode, the slicer
output shown in Figure 32 is routed to the data synchronizer
PLL for clock synchronization. To enable the linear FSK
demodulator, set Bits R4_DB (4:5) to [00].
The 3 dB bandwidth of the postdemodulation filter is set in the
same way as the FSK correlator/demodulator, which is set in
R4_DB (6:15) and is defined as
where:
F
postdemodulator filter. DEMOD_CLK is as defined in the
Register 3—Receiver Clock Register section, Note 2.
ASK/OOK Operation
ASK/OOK demodulation is activated by setting Bits R4_DB (4:5)
to [10].
ASK/OOK demodulation is performed by digitally filtering the
RSSI output, and then comparing the filter output with its average
value in a similar manner to FSK demodulation. The bandwidth
of the digital filter must be optimized to remove any excess
noise without causing ISI in the received ASK/OOK signal.
The 3 dB bandwidth of this filter is typically set at approximately
0.75 times the user data rate and is assigned by R4 _DB (6:15) as
ADC RSSI OUTPUT
LIMITER
Q
I
CUTOFF
Figure 32. Block Diagram of Frequency Measurement System and
Post
is the target 3 dB bandwidth in hertz of the
LINEAR DISCRIMINATOR
LEVEL
_
Demod
FREQUENCY
IF
ASK/OOK/Linear FSK Demodulator
_
BW
_
7
Setting
MUX 1
DB(6:15)
=
2
DEMOD
10
×
2
π
×
F
_
CUTOFF
CLK
FREQUENCY
READBACK
AND
AFC LOOP
SLICER
Rx DATA
Rev. 0 | Page 23 of 48
where F
postdemodulator filter.
It is also recommended to use Manchester encoding in ASK/OOK
mode to ensure the data run length limit (RLL) is 2 bits. If a longer
RLL, up to a maximum of 4 bits, is required, users should disable
the extra-low gain setting by writing 0x3C00C to the test mode
register.
AFC SECTION
The ADF7020-1 supports a real-time AFC loop, which is used
to remove frequency errors that can arise due to mismatches
between the transmit and receive crystals. The AFC loop uses the
frequency discriminator block as described in the Linear FSK
Demodulator section (see Figure 32). The discriminator output
is filtered and averaged to remove the FSK frequency
modulation using a combined averaging filter and envelope
detector. In FSK mode, the output of the envelope detector
provides an estimate of the average IF frequency. Two methods
of AFC, external and internal, are supported on the ADF7020-1
(in FSK mode only).
External AFC
The user reads back the frequency information through the
ADF7020-1 serial port and applies a frequency correction value
to the fractional-N synthesizer’s N divider.
The frequency information is obtained by reading the 16-bit
signed AFC_readback, as described in the Readback Format
section, and applying the following formula:
Note that while the AFC_READBACK value is a signed number,
under normal operating conditions it is positive. In the absence
of frequency errors, the FREQ_RB value is equal to the IF
frequency of 200 kHz.
Internal AFC
The ADF7020-1 supports a real-time internal automatic fre-
quency control loop. In this mode, an internal control loop
automatically monitors the frequency error and adjusts the
synthesizer N divider using an internal PI control loop.
The internal AFC control loop parameters are controlled in
Register 11. The internal AFC loop is activated by setting
R11_DB20 to 1. A scaling coefficient must also be entered,
based on the crystal frequency in use. This is set up in R11_DB
(4:19) and should be calculated using
Therefore, using a 10 MHz XTAL yields an AFC scaling
coefficient of 839.
Post_Demod_BW_Setting =
FREQ_RB [Hz] = (AFC_READBACK × DEMOD_CLK)/2
AFC_Scaling_Coefficient = (500 × 2
CUTOFF
is the target 3 dB bandwidth in hertz of the
2
10
DEMOD_CLK
× 2
π
24
×
)/XTAL
F
CUTOFF
ADF7020-1
15