ADSP-21160MKBZ-80 Analog Devices Inc, ADSP-21160MKBZ-80 Datasheet - Page 48

• Manufacturer Part Number: ADSP-21160MKBZ-80
• Description: 32bit SHARC W/SIMD Capability
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21160MKBZ-80

• Interface: Host Interface, Link Port, Serial Port
• Clock Rate: 80MHz
• Non-volatile Memory: External
• On-chip Ram: 512kB
• Voltage - I/o: 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Device Core Size: 32b
• Architecture: Enhanced Harvard
• Format: Floating Point
• Clock Freq (max): 80MHz
• Mips: 80
• Device Input Clock Speed: 80MHz
• Ram Size: 512KB
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (min): 2.37/3.13V
• Operating Supply Voltage (max): 2.63/3.47V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 400
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADSP-21160M
Table 32. 400-ball Metric PBGA Pin Assignments (Continued)
Pin Name
DATA[44]
DATA[43]
DATA[42]
DATA[41]
V
V
GND
GND
GND
GND
GND
GND
GND
GND
V
V
L2DAT[2]
L2DAT[0]
HBG
HBR
NC
NC
DATA[48]
DATA[51]
V
V
GND
GND
GND
GND
GND
GND
GND
GND
V
V
L3DAT[5]
L3DAT[6]
L3DAT[4]
L3CLK
DDEXT
DDINT
DDINT
DDEXT
DDEXT
DDINT
DDINT
DDEXT
PBGA Pin#
J01
J02
J03
J04
J05
J06
J07
J08
J09
J10
J11
J12
J13
J14
J15
J16
J17
J18
J19
J20
N01
N02
N03
N04
N05
N06
N07
N08
N09
N10
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
Pin Name
CLK_CFG_0 K01
DATA[46]
DATA[45]
DATA[47]
V
V
GND
GND
GND
GND
GND
GND
GND
GND
V
V
BR6
BR5
BR4
BR3
DATA[49]
DATA[50]
DATA[52]
DATA[55]
V
V
GND
GND
GND
GND
GND
GND
GND
GND
V
V
L3DAT[2]
L3DAT[1]
L3DAT[3]
L3ACK
DDEXT
DDINT
DDINT
DDEXT
DDEXT
DDINT
DDINT
DDEXT
PBGA Pin#
K02
K03
K04
K05
K06
K07
K08
K09
K10
K11
K12
K13
K14
K15
K16
K17
K18
K19
K20
P01
P02
P03
P04
P05
P06
P07
P08
P09
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
–48–
Pin Name
CLKIN
CLK_CFG_1 L02
AGND
CLK_CFG_2 L04
V
V
GND
GND
GND
GND
GND
GND
GND
GND
V
V
BR2
BR1
ACK
REDY
DATA[53]
DATA[54]
DATA[57]
DATA[60]
V
V
GND
GND
GND
GND
GND
GND
GND
GND
GND
V
L4DAT[5]
L4DAT[6]
L4DAT[7]
L3DAT[0]
DDEXT
DDINT
DDINT
DDEXT
DDEXT
DDINT
DDEXT
PBGA Pin#
L01
L03
L05
L06
L07
L08
L09
L10
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
R01
R02
R03
R04
R05
R06
R07
R08
R09
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
Pin Name
AV
CLK_CFG_3 M02
CLKOUT
GND
V
V
GND
GND
GND
GND
GND
GND
GND
GND
V
V
PAGE
SBTS
PA
L3DAT[7]
DATA[56]
DATA[58]
DATA[59]
DATA[63]
V
V
V
V
V
V
V
V
V
V
V
V
L4DAT[3]
L4ACK
L4CLK
L4DAT[4]
DDEXT
DDINT
DDINT
DDEXT
DDEXT
DDINT
DDINT
DDINT
DDINT
DDINT
DDINT
DDINT
DDINT
DDINT
DDINT
DDEXT
DD
PBGA Pin#
M01
M03
M04
M05
M06
M07
M08
M09
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
T01
T02
T03
T04
T05
T06
T07
T08
T09
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
REV. 0