ADUC7124BCPZ126-RL Analog Devices Inc, ADUC7124BCPZ126-RL Datasheet - Page 6
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ADUC7124BCPZ126-RL
Manufacturer Part Number
ADUC7124BCPZ126-RL
Description
ARM7 With 12-Bit ADC & DACs, 128kB Flash
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.ADUC7126BSTZ126.pdf
(104 pages)
Specifications of ADUC7124BCPZ126-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
41.78MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
30
Program Memory Size
126KB (63K x 16)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7124BCPZ126-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADuC7124/ADuC7126
Parameter
ANALOG OUTPUTS
DAC IN OP AMP MODE
DAC AC CHARACTERISTICS
COMPARATOR
TEMPERATURE SENSOR
POWER SUPPLY MONITOR (PSM)
POWER-ON RESET
WATCHDOG TIMER (WDT)
FLASH/EE MEMORY
DIGITAL INPUTS
Output Voltage Range 2
Output Impedance
DAC Output Buffer in Op Amp Mode
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Gain
Unity Gain Frequency
CMRR
Settling Time
Output Slew Rate
PSRR
Voltage Output at 25°C
Voltage Temperature Coefficient
Accuracy
Endurance
Data Retention
Logic 1 Input Current
Logic 0 Input Current
Input Capacitance
Output Voltage Range 0
Output Voltage Range 1
Voltage Output Settling Time
Digital-to-Analog Glitch Energy
Input Offset Voltage
Input Bias Current
Input Voltage Range
Input Capacitance
Hysteresis
Response Time
IOV
Power Supply Trip Point Accuracy
Timeout Period
θ
64-Lead LFCSP
JA
DD
Thermal Impedance
Trip Point Selection
4, 6
9
10
Min
AGND
2
0
10,000
20
Typ
0 to DAC
0 to 2.5
0 to DACV
0.5
±0.4
4
2
2.5
70
4.5
78
12
3.2
75
10
±10
±15
1
8.5
4
1.415
1.392
3.914
4.52
±3
2.79
3.07
±2.5
2.41
±0.2
−40
−80
5
24
REF
DD
Rev. B | Page 6 of 104
Max
AV
15
512
±1
−60
−120
DD
– 1.2
Unit
V
V
V
Ω
mV
µV/°C
nA
nA
dB
MHz
dB
µs
V/µs
dB
µs
nV-sec
mV
µA
V
pF
mV
µs
V
V
mV/°C
mV/°C
°C
°C/W
V
V
%
V
sec
Cycles
Years
µA
µA
µA
pF
Test Conditions/Comments
DAC
5 kΩ load
R
R
R
1 LSB change at major carry (where maximum
number of bits simultaneously change in the
DACxDAT register)
Hysteresis can be turned on or off via the
CMPHYST bit in the CMPCON register
100 mV overdrive and configured with
CMPRES = 11
ADuC7124
ADuC7126
ADuC7124
ADuC7126
A single point calibration is required
Two selectable trip points
Of the selected nominal trip point voltage
T
All digital inputs excluding XCLKI and XCLKO
V
V
V
L
L
L
J
IH
IL
IL
= 5 kΩ, C
= 5 kΩ, C
= 5 kΩ, C
= 85°C
= 0 V; except TDI, TDO, and RTCK
= 0 V; TDI, TDO, and RTCK
= V
REF
DD
range: DACGND to DACV
or V
L
L
L
= 100 pF
= 100 pF
= 100 pF
IH
= 5 V
DD