CY7C009V-15AXC Cypress Semiconductor Corp, CY7C009V-15AXC Datasheet - Page 2

CY7C009V-15AXC

CY7C009V-15AXC

Manufacturer Part Number
CY7C009V-15AXC
Description
CY7C009V-15AXC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C009V-15AXC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
1M (128K x 8)
Speed
15ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-1786

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C009V-15AXC
Manufacturer:
CYPRESS
Quantity:
233
Part Number:
CY7C009V-15AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C009V-15AXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Functional Description
The CY7C008V/009V and CY7C018V/019V are low-power
CMOS 64 K, 128 K × 8/9 dual-port static RAMs. Various
arbitration schemes are included on the devices to handle
situations when multiple processors access the same piece of
data.
asynchronous access for reads and writes to any location in
memory. The devices can be utilized as standalone 8/9-bit
dual-port static RAMs or multiple devices can be combined in
order to function as a 16/18-bit or wider master/slave dual-port
static RAM. An M/S pin is provided for implementing 16/18-bit or
wider memory applications without the need for separate master
and slave devices or additional discrete logic. Application areas
include interprocessor/multiprocessor designs, communications
status buffering, and dual-port video/graphics memory.
Document Number: 38-06044 Rev. *E
Two
ports
are
provided
permitting
independent,
Each port has independent control pins: chip enable (CE), read
or write enable (R/W), and output enable (OE). Two flags are
provided on each port (BUSY and INT). BUSY signals that the
port is trying to access the same location currently being
accessed by the other port. The interrupt flag (INT) permits
communication between ports or systems by means of a mail
box. The semaphores are used to pass a flag, or token, from one
port to the other to indicate that a shared resource is in use. The
semaphore logic is comprised of eight shared latches. Only one
side can control the latch (semaphore) at any time. Control of a
semaphore indicates that a shared resource is in use. An
automatic power-down feature is controlled independently on
each port by a chip select (CE) pin.
The CY7C008V/009V and CY7C018V/019V are available in
100-pin Thin Quad Plastic Flatpacks (TQFP).
CY7C008V/009V
CY7C018V/019V
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