DSPIC33FJ12MC202-E/SP Microchip Technology, DSPIC33FJ12MC202-E/SP Datasheet - Page 120

• Manufacturer Part Number: DSPIC33FJ12MC202-E/SP
• Description: 12KB, Flash, 1024bytes-RAM, 40MIPS, 21I/O, 16-bit Family,nanoWatt,MotorControl 2
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-E/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164337 - MODULE SOCKET FOR PM3 40DIP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC33FJ12MC201/202
TABLE 10-1:
10.4.2.2
In contrast to inputs, the outputs of the peripheral pin
select options are mapped on the basis of the pin. In
this case, a control register associated with a particular
pin dictates the peripheral output to be mapped. The
RPORx registers are used to control output mapping.
Like the RPINRx registers, each register contains sets
of 5-bit fields, with each set associated with one RPn
pin (see Register 10-14 through Register 10-21). The
value of the bit field corresponds to one of the periph-
erals, and that peripheral’s output is mapped to the pin
(see Table 10-2 and Figure 10-3).
The list of peripherals for output mapping also includes
a null value of ‘00000’
technique. This permits any given pin to remain
unconnected from the output of any of the pin
selectable peripherals.
DS70265D-page 118
External Interrupt 1
External Interrupt 2
Timer2 External Clock
Timer3 External Clock
Input Capture 1
Input Capture 2
Input Capture 7
Input Capture 8
Output Compare Fault A
PWM1 Fault
PWM2 Fault
QEI1 Phase A
QEI1 Phase B
QEI1 Index
UART1 Receive
UART1 Clear To Send
SPI1 Data Input
SPI1 Clock Input
SPI1 Slave Select Input
Note 1:
Unless otherwise noted, all inputs use the Schmitt input buffers.
Output Mapping
Input Name
SELECTABLE INPUT SOURCES (MAPS INPUT TO FUNCTION)
because of the mapping
Function Name
U1CTS
Preliminary
OCFA
FLTA1
FLTA2
U1RX
SCK1
T2CK
T3CK
INDX
SDI1
INT1
INT2
QEA
QEB
SS1
IC1
IC2
IC7
IC8
FIGURE 10-3:
U1RTS Output enable 4
UPDN Output enable
U1TX Output enable
OC2 Output enable
U1RTS Output 4
UPDN Output
U1TX Output
RPINR10
RPINR10
RPINR12
RPINR13
RPINR14
RPINR14
RPINR15
RPINR18
RPINR18
RPINR20
RPINR20
RPINR21
RPINR11
Register
OC2 Output
RPINR0
RPINR1
RPINR3
RPINR3
RPINR7
RPINR7
default
default
RPnR<4:0>
MULTIPLEXING OF
REMAPPABLE OUTPUT
FOR RPn
19
19
© 2009 Microchip Technology Inc.
26
26
0
0
3
3
(1)
Output enable
Output Data
Configuration
U1CTSR<4:0>
INDX1R<4:0>
FLTA1R<4:0>
FLTA2R<4:0>
OCFAR<4:0>
QEA1R<4:0>
QEB1R<4:0>
U1RXR<4:0>
SCK1R<4:0>
T2CKR<4:0>
T3CKR<4:0>
SDI1R<4:0>
INT1R<4:0>
INT2R<4:0>
SS1R<4:0>
IC1R<4:0>
IC2R<4:0>
IC7R<4:0>
IC8R<4:0>
Bits
RPn