DSPIC33FJ12MC202-E/SP Microchip Technology, DSPIC33FJ12MC202-E/SP Datasheet - Page 147

• Manufacturer Part Number: DSPIC33FJ12MC202-E/SP
• Description: 12KB, Flash, 1024bytes-RAM, 40MIPS, 21I/O, 16-bit Family,nanoWatt,MotorControl 2
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-E/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164337 - MODULE SOCKET FOR PM3 40DIP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.0
The Input Capture module is useful in applications
requiring frequency (period) and pulse measurement.
The dsPIC33FJ12MC201/202 devices support up to
eight input capture channels.
The Input Capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
1.
2.
FIGURE 13-1:
© 2009 Microchip Technology Inc.
Note:
- Capture timer value on every falling edge of
- Capture timer value on every rising edge of
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
ICx Pin
Simple Capture Event modes:
input at ICx pin
input at ICx pin
Capture timer value on every edge (rising and
falling)
INPUT CAPTURE
This data sheet summarizes the features
of the dsPIC33FJ12MC201/202 family of
devices. It is not intended to be a
comprehensive
complement the information in this data
sheet, refer to the “dsPIC33F Family Ref-
erence Manual”, Section 12. “Input Cap-
ture” (DS70198), which is available from
the
(www.microchip.com).
Prescaler
(1, 4, 16)
Counter
3
Microchip
INPUT CAPTURE BLOCK DIAGRAM
System Bus
ICxCON
ICM<2:0> (ICxCON<2:0>)
reference
ICOV, ICBNE (ICxCON<4:3>)
Mode Select
Edge Detection Logic
web
Clock Synchronizer
source.
ICxI<1:0>
and
site
Preliminary
To
dsPIC33FJ12MC201/202
(in IFSn Register)
Set Flag ICxIF
Interrupt
Logic
3.
Each Input Capture channel can select one of two
16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on Input Capture event
• 4-word FIFO buffer for capture values
• Use of Input Capture to provide additional
- Capture timer value on every 4th rising edge
- Capture timer value on every 16th rising
Sleep and Idle modes
- Interrupt optionally generated after 1, 2, 3, or
sources of external interrupts
Prescaler Capture Event modes:
of input at ICx pin
edge of input at ICx pin
4 buffer locations are filled
Logic
FIFO
R/W
From 16-bit Timers
TMR2 TMR3
1
ICxBUF
16
0
DS70265D-page 145
16
ICTMR
(ICxCON<7>)