DSPIC33FJ32GP204-E/ML Microchip Technology, DSPIC33FJ32GP204-E/ML Datasheet - Page 106

• Manufacturer Part Number: DSPIC33FJ32GP204-E/ML
• Description: 16-bit DSC, 32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP204-E/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
REGISTER 8-3:
DS70290G-page 106
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 8-0
Note 1:
R/W-0
U-0
—
This register is reset only on a Power-on Reset (POR).
Unimplemented: Read as ‘0’
PLLDIV<8:0>: PLL Feedback Divisor bits (also denoted as ‘M’, PLL multiplier)
111111111 = 513
•
•
•
000110000 = 50 (default)
•
•
•
000000010 = 4
000000001 = 3
000000000 = 2
R/W-0
U-0
—
PLLFBD: PLL FEEDBACK DIVISOR REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-1
U-0
—
R/W-1
U-0
—
PLLDIV<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
—
R/W-0
(1)
U-0
—
© 2011 Microchip Technology Inc.
x = Bit is unknown
R/W-0
U-0
—
PLLDIV<8>
R/W-0
R/W-0
bit 8
bit 0