EVAL-ADF7021-VDB2Z Analog Devices Inc, EVAL-ADF7021-VDB2Z Datasheet - Page 30

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EVAL-ADF7021-VDB2Z

Manufacturer Part Number
EVAL-ADF7021-VDB2Z
Description
868 - 870MHz - EVALUATION BOARD
Manufacturer
Analog Devices Inc
Type
Transceiverr
Datasheet

Specifications of EVAL-ADF7021-VDB2Z

Frequency
868MHz ~ 870MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADF7021
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADF7021-V
DEMODULATION, DETECTION, AND CDR
System Overview
An overview of the demodulation, detection, and clock and
data recovery (CDR) of the received signal on the ADF7021-V
is shown in Figure 46.
The quadrature outputs of the IF filter are first limited and
then fed to either the correlator FSK demodulator or to the
linear FSK demodulator. The correlator demodulator is used
to demodulate 2FSK, 3FSK, and 4FSK. The linear demodulator
is used for frequency measurement and is enabled when the
AFC loop is active. The linear demodulator can also be used
to demodulate 2FSK.
Following the demodulator, a digital postdemodulator filter
removes excess noise from the demodulator signal output.
Threshold/slicer detection is used for data recovery of 2FSK and
4FSK. Data recovery of 3FSK can be implemented using either
threshold detection or Viterbi detection.
An on-chip CDR PLL is used to resynchronize the received bit
stream to a local clock. It outputs the retimed data and clock on
the TxRxDATA and TxRxCLK pins, respectively.
Correlator Demodulator
The correlator demodulator can be used for 2FSK, 3FSK, and
4FSK demodulation. Figure 47 shows the operation of the
correlator demodulator for 2FSK.
DISCRIMINATOR_BW
LIMITERS
TxRxDATA
TxRxCLK
Q
REG 4, BITS[DB19:DB10]
I
Figure 46. Overview of Demodulation, Detection, and CDR Process
LIMITERS
Q
I
Figure 47. 2FSK Correlator FSK Demodulator Operation
FREQUENCY CORRELATOR
RECOVERY
CLOCK
IF –
DATA
AND
DISCRIM BW
DEMODULATOR
DEMODULATOR
f
CORRELATOR
DEV
DOT_PRODUCT
REG 4, BIT DB7
LINEAR
IF
IF +
REG 4, BITS[DB9:DB8]
MUX
f
DEV
Rx_INVERT
MUX
2FSK/3FSK/4FSK
THRESHOLD
DETECTION
DETECTION
VITERBI
3FSK
2FSK = +1, –1
3FSK = +1, 0, –1
4FSK = +3, +1, –1, –3
OUTPUT LEVELS:
Rev. 0 | Page 30 of 60
The quadrature outputs of the IF filter are first limited and then
fed to a digital frequency correlator that performs filtering and
frequency discrimination of the 2FSK/3FSK/4FSK spectrum.
For 2FSK modulation, data is recovered by comparing the
output levels from two correlators. The performance of this
frequency discriminator approximates that of a matched filter
detector, which is known to provide optimum detection in the
presence of additive white Gaussian noise (AWGN). This
method of FSK demodulation provides approximately 3 dB to
4 dB better sensitivity than a linear demodulator.
Linear Demodulator
Figure 48 shows a block diagram of the linear demodulator.
A digital frequency discriminator provides an output signal that
is linearly proportional to the frequency of the limiter outputs.
The discriminator output is filtered and averaged using a com-
bined averaging filter and envelope detector. The demodulated
2FSK data from the postdemodulator filter is recovered by
slicing against the output of the envelope detector, as shown in
Figure 48. This method of demodulation corrects for frequency
errors between the transmitter and receiver when the received
spectrum is close to or within the IF bandwidth. This envelope
detector output is also used for AFC readback and provides the
frequency estimate for the AFC control loop.
Postdemodulator Filter
A second-order, digital low-pass filter removes excess noise from
the demodulated bit stream at the output of the discriminator.
The bandwidth of this postdemodulator filter is programmable
and must be optimized for the user’s data rate and the received
modulation type. If the bandwidth is too narrow, performance
degrades due to intersymbol interference (ISI). If the bandwidth
is too wide, excess noise degrades the performance of the receiver.
The POST_DEMOD_BW bits (Register 4, Bits[DB29:DB20])
set the bandwidth of this filter.
LIMITERS
Q
I
DISCRIMINATOR
LEVEL
FREQUENCY
Figure 48. Block Diagram of Linear FSK Demodulator
LINEAR
IF
REG 4, BITS[DB29:DB20]
+
SLICER
FREQUENCY
READBACK
AND AFC LOOP
RxCLK
2FSK
2FSK RxDATA

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