CYII4SD1300AA-QWC Cypress Semiconductor Corp, CYII4SD1300AA-QWC Datasheet - Page 26
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CYII4SD1300AA-QWC
Manufacturer Part Number
CYII4SD1300AA-QWC
Description
IC SENSOR IMAGE COLOR 84-LCC
Manufacturer
Cypress Semiconductor Corp
Type
CMOS Imagingr
Datasheet
1.CYII4SM1300AA-QDC.pdf
(35 pages)
Specifications of CYII4SD1300AA-QWC
Pixel Size
7µm² x 7µm²
Active Pixel Array
1286H x 1030V
Frames Per Second
7
Voltage - Supply
5V
Package / Case
84-LCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Offset Level Adjustment
The offset level of the output signal is set by a 4-bit digital word.
The offset level voltage is selected between VLOW_DAC and
VHIGH_DAC on 16 taps.
Figure 24
integration mode. The curve also shows the response of the
same pixel in linear integration mode, with a long and short
integration time, at the same light levels.
Dual slope integration is obtained by
■
■
■
Document Number: 38-05707 Rev. *C
Feeding a lower supply voltage to VDD_RESETL, e.g., apply
4 to 4.5 volts. The difference between this voltage and VDD
determines the range of the high sensitivity, thus the output
signal level at which the transition between high and low sensi-
tivity occurs.
Put the amplifier gain to the lowest value where the analog
output swing covers the ADC's digital input swing. Increasing
the amplification too much will likely boost the high sensitivity
part over the whole ADC range.
The electronic shutter determines the ratio of integration times
of the two slopes. The high sensitivity ramp corresponds to "no
electronic shutter", thus maximal integration time. The low
sensitivity ramp corresponds to the electronics shutter value
that would have been obtained in normal operation.
1.8
1.6
1.4
1.2
0.8
0.6
0.4
0.2
1
0
0%
shows the response curve of a pixel in dual slope
20%
Figure 24. Response Curve of the Pixels in Dual Slope Integration
40%
"Double Slope" or "High-Dynamic Range" Mode
IBIS4-1300 has a feature to increase the dynamic range. The
pixel response can be extended over a larger range of light inten-
sities by using a "dual slope integration" (patents pending). This
is obtained by the addition of charge packets from a long and a
short integration time in the pixel during the same frame time.
These
http://www.fillfactory.com/htm/technology/htm/dual-slope.htm.
Figure 25. Linear Long Exposure Time
60%
Relative exposure (arbitrary scale)
example
Dual slope operation
Long integration time
Short integration time
80%
images
CYII4SM1300AA
are
100%
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