DS3102GN Maxim Integrated Products, DS3102GN Datasheet - Page 109
DS3102GN
Manufacturer Part Number
DS3102GN
Description
Timers & Support Products Stratum 3 Timing Car d IC SEC-EEC Timing
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3102GN.pdf
(142 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 4 to 0: T0 DPLL Acquisition Bandwidth (T0ABW[4:0]). This field configures the bandwidth of the T0 DPLL
when acquiring lock. When AUTOBW = 0 in the
for locked operation. When AUTOBW = 1,
used for locked operation. See Section 7.7.3.
19-4617; Rev 5; 8/10
____________________________________________________________________________________________ DS3102
00000 = 0.5mHz
00001 = 1mHz
00010 = 2mHz
00011 = 4mHz
00100 = 8mHz
00101 = 15mHz
00110 = 30mHz
00111 = 60mHz
01000 = 0.1Hz
01001 = 0.3Hz
01010 = 0.6Hz
01011 = 1.2Hz
01100 = 2.5Hz
01101 = 4Hz
01110 = 8Hz
01111 = 18Hz (default)
10000 = 35Hz
10001 = 70Hz
10010 = 120Hz
10011 = 250Hz
10100 = 400Hz
10101–11111 = unused
—
7
0
—
6
0
T0ABW
T0 DPLL Acquisition Bandwidth Register
69h
—
5
0
T0ABW
MCR9
bandwidth is used for acquisition while T0LBW bandwidth is
register, the T0LBW bandwidth is used for acquisition and
4
0
1
3
T0ABW[4:0]
2
1
1
1
109 of 142
0
1
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