MAX3873AEGP Maxim Integrated Products, MAX3873AEGP Datasheet - Page 4

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MAX3873AEGP

Manufacturer Part Number
MAX3873AEGP
Description
Timers & Support Products Low-Power, Compact 2 .5-2.7Gbps Clock Rec
Manufacturer
Maxim Integrated Products
Type
Clock Recoveryr
Datasheet

Specifications of MAX3873AEGP

Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Current
112 mA
Package / Case
QFN-20 EP
Dc
0509
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Low-Power, Compact 2.5Gbps or 2.7Gbps
Clock-Recovery and Data-Retiming IC
AC ELECTRICAL CHARACTERISTICS (continued)
(V
noted.) (Note 4)
Note 1: At T
Note 2: CML outputs open.
Note 3: R
Note 4: AC characteristics are guaranteed by design and characterization.
Note 5: Relative to the falling edge of SCLKO+. See Figure 2.
Note 6: Measured with 2
Note 7: Jitter BW = 12kHz to 20MHz.
Note 8: RATESET = low.
Note 9: RATESET = high.
Figure 1. Definition of Input Voltage Swing
Figure 3. Definition of Phase Acquisition Time
Figure 4. Definition of LOL Assert Time and Frequency Acquisition Time
4
CC
V
V
V
V
CC
CC
CC
CC
_______________________________________________________________________________________
= 3.0V to 3.6V, C
+ 0.4V
- 0.4V
- 0.4V
- 0.8V
V
V
CC
CC
L
= 50Ω to V
A
LOL OUTPUT
INPUT DATA
= -40°C, DC characteristics are guaranteed by design and characterization.
(a) AC-COUPLED SINGLE-ENDED INPUT (CML OR PECL)
(b) DC-COUPLED SINGLE-ENDED CML INPUT
CC
F
SERIAL DATA
= 0.022µF, T
23
.
FASTRACK
- 1 PRBS.
800mV
800mV
A
= -40°C to +85°C. Typical values are at V
LOL ASSERT TIME
1200 BITS OF 1–0 PATTERN
25mV
25mV
<2μs
Figure 2. Definition of Clock-to-Q Delay
SCLKO+
SDO
VCO CLOCK PHASE ALIGNED TO INPUT DATA
FREQUENCY ACQUISITION TIME
CC
= 3.3V, 2.488Gbps, T
DATA
t
CLK
A
= +25°C, unless otherwise
t
CLK-Q

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