ISPPAC-CLK5620V-01TN100I Lattice, ISPPAC-CLK5620V-01TN100I Datasheet - Page 27

Clock Drivers & Distribution PROGRAMMABLE ZERO DELAY CL GEN

ISPPAC-CLK5620V-01TN100I

Manufacturer Part Number
ISPPAC-CLK5620V-01TN100I
Description
Clock Drivers & Distribution PROGRAMMABLE ZERO DELAY CL GEN
Manufacturer
Lattice
Type
Zero Delay Programmable PLL Clock Generatorr

Specifications of ISPPAC-CLK5620V-01TN100I

Max Input Freq
320 MHz
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPPAC-CLK5620V-01TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
LVPECL mode. The far end of the transmission line must be terminated with a 100Ω resistor across the two signal
lines.
Figure 22. Configuration for LVDS and LVPECL Output Modes
Note that when in LVPECL output mode, the ispClock5600’s output driver provides an internal pull-down, unlike a
typical bipolar LVPECL driver. For this reason no external pull-down resistors are necessary and the driver may be
terminated with a single 100Ω resistor across the signal lines. For proper operation, pull-down resistors should
NOT be used with the ispClock5600’s LVPECL output mode.
Thermal Management
In applications where a majority of the ispClock5610 or ispClock5620’s outputs are active and operating at or near
maximum output frequency (320 MHz), package thermal limitations may need to be considered to ensure a suc-
cessful design. Thermal characteristics of the packages employed by Lattice Semiconductor may be found in the
document Thermal Management which may be obtained at www.latticesemi.com.
The maximum current consumption of the digital and analog core circuitry is approximately 167mA worst case
(I
MHz, both outputs in each bank enabled). This results in a total device dissipation:
With a maximum recommended operating junction temperature (T
maximum allowable ambient temperature (T
where Θ
The above analysis represents the worst-case scenario. Significant improvement in maximum ambient operating
temperature can be realized with additional cooling. Providing a 200 LFM (Linear Feet per Minute) airflow reduces
Θ
In practice, however, the absolute worst-case situation will be relatively rare, as not all outputs may be running at
maximum output frequency in a given application. Additionally, if the internal VCO is operating at less than its max-
imum frequency (640MHz), it requires less current on the VCCD pin. In these situations, one can estimate the
effective I
VCO frequency. Normalized curves relating current to operating frequency for these parameters may be found in
the Typical Performance Characteristics section.
While it is possible to perform detailed calculations to estimate the maximum ambient operating temperature from
operating conditions, some simpler rule-of-thumb guidance can also be obtained through the derating curves
shown in Figure 23. The curves in Figure 23a show the maximum ambient operating temperature permitted when
operating a given number of output banks at the maximum output frequency (320MHz). Note that it is assumed that
both outputs in each bank are active.
CCD
JA
to 29°C/W, which results in a maximum ambient operating temperature of 66°C.
+ I
CCA
JA
CCO
= 35 °C/W for the 100 TQFP package and Θ
), and each of the output banks may draw up to 35mA worst case (LVCMOS 3.3V, CL=18pF, f
for each bank and the effective I
LVDS/LVPECL
mode
ispClock5600
T
AMAX
= T
P
DMAX
JOP
- PD
= 3.3V x (10 x 35mA + 167mA) = 1.7W
AMAX
MAX
CCD
) can be estimated as
x Θ
JA
for the digital core functions based on output frequency and
= 115°C - 1.7W x 35°C/W = 55°C
JA
27
= 48 °C/W for the 48 TQFP package in still air.
Zo=50Ω
Zo=50Ω
JOP
) of 115°C for an industrial grade device, the
ispClock5600 Family Data Sheet
RT=100
LVDS/PECL
Receiver
OUT
=320
(3)
(4)

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