ispPAC-CLK5304S-01T48I Lattice, ispPAC-CLK5304S-01T48I Datasheet - Page 29

• Manufacturer Part Number: ispPAC-CLK5304S-01T48I
• Description: Clock Drivers & Distribution ISP 0 Delay Unv Fan- Out Buf-Sngl End I
• Manufacturer: Lattice

Specifications of ispPAC-CLK5304S-01T48I

• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: 85 C
• Package / Case: TQFP-48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Non Zero Delay Buffer Mode 1
In the non zero delay buffer mode as shown in Figure 24 the output routing matrix completely bypasses the PLL.
Each of the single ended input reference clocks can be routed to any number of available output clocks.
In this mode of operation there is no skew control.
Figure 24. Non Zero Delay Fan Out Buffer Mode 1
Single Ended /
Clock Input
REFB_REFN /
REFA_REFP
Single Ended /
Clock Input
REFA_REFP /
REFB_REFN
ispClock5300S
PLL Bypassed
29
V1
V2
V3
ispClock5300S Family Data Sheet