LAN9512I-JZX SMSC, LAN9512I-JZX Datasheet

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LAN9512I-JZX

Manufacturer Part Number
LAN9512I-JZX
Description
Ethernet ICs Hi-Speed USB 2.0 Hub High 10/100 Ethernet
Manufacturer
SMSC
Datasheet

Specifications of LAN9512I-JZX

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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LAN9512I-JZX
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LAN9512I-JZX
Manufacturer:
SMSC
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20 000
PRODUCT FEATURES
Highlights
Target Applications
Key Features
SMSC LAN9512/LAN9512i
Two downstream ports, one upstream port
Integrated 10/100 Ethernet MAC with full-duplex
Integrated 10/100 Ethernet PHY with HP Auto-MDIX
Implements Reduced Power Operating Modes
Minimized BOM Cost
Desktop PCs
Notebook PCs
Printers
Game Consoles
Embedded Systems
Docking Stations
USB Hub
— Two integrated downstream USB 2.0 PHYs
— One integrated upstream USB 2.0 PHY
support
— Single 25 MHz crystal (Eliminates cost of separate
— Built-in Power-On-Reset (POR) circuit (Eliminates
— Fully compliant with Universal Serial Bus Specification
— HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps)
— Two downstream ports, one upstream port
— Port mapping and disable support
— Port Swap: Programmable USB diff-pair pin location
— PHY Boost: Programmable USB signal drive strength
— Select presence of a permanently hardwired USB
— Advanced power saving features
— Downstream PHY goes into low power mode when port
— Full Power Management with individual or ganged
— Integrated USB termination Pull-up/Pull-down resistors
— Internal short circuit protection of USB differential signal
crystals for USB and Ethernet)
requirement for external passive or active reset)
Revision 2.0
compatible
peripheral device on a port by port basis
power to the port is disabled
power control of each downstream port.
pins
DATASHEET
High-Performance 10/100 Ethernet Controller
Power and I/Os
Miscellaneous features
Software
Packaging
Environmental
— Fully compliant with IEEE802.3/802.3u
— Integrated Ethernet MAC and PHY
— 10BASE-T and 100BASE-TX support
— Full- and half-duplex support with flow control
— Preamble generation and removal
— Automatic 32-bit CRC generation and checking
— Automatic payload padding and pad removal
— Loop-back modes
— TCP/UDP checksum offload support
— Flexible address filtering modes
— Wakeup packet support
— Integrated Ethernet PHY
— Three PHY LEDs
— Eight GPIOs
— Supports bus-powered and self-powered operation
— Internal 1.8v core supply regulator
— External 3.3v I/O supply
— Optional EEPROM
— Optional 24MHz reference clock output for partner hub
— IEEE 1149.1 (JTAG) Boundary Scan
— Windows 2000/XP/Vista Driver
— Linux Driver
— Win CE Driver
— MAC OS Driver
— EEPROM Utility
— 64-pin QFN, lead-free RoHS compliant
— Commercial Temperature Range (0°C to +70°C)
— Industrial Temperature Range (-40°C to +85°C)
— ±8kV HBM without External Protection Devices
— ±8kV contact mode (IEC61000-4-2)
— ±15kV air-gap discharge mode (IEC61000-4-2)
LAN9512/LAN9512i
USB 2.0 Hub and 10/100
Ethernet Controller
– One 48-bit perfect address
– 64 hash-filtered multicast addresses
– Pass all multicast
– Promiscuous mode
– Inverse filtering
– Pass all incoming with status report
– Auto-negotiation, HP Auto-MDIX
– Automatic polarity detection and correction
– Energy Detect
Revision 1.0 (11-24-09)
Datasheet

Related parts for LAN9512I-JZX

LAN9512I-JZX Summary of contents

Page 1

... Full Power Management with individual or ganged power control of each downstream port. — Integrated USB termination Pull-up/Pull-down resistors — Internal short circuit protection of USB differential signal pins SMSC LAN9512/LAN9512i LAN9512/LAN9512i USB 2.0 Hub and 10/100 Ethernet Controller High-Performance 10/100 Ethernet Controller — ...

Page 2

... LAN9512-JZX for 64-pin, QFN lead-free RoHS compliant package (0 to +70°C temp range) LAN9512i-JZX for 64-pin, QFN lead-free RoHS compliant package (-40 to +85°C temp range) This product meets the halogen maximum concentration values per IEC61249-2-21 For RoHS compliance and environmental information, please visit 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © ...

Page 3

... Operational Current Consumption & Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.4 DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.5 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.5.1 Equivalent Test Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.5.2 Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.5.3 EEPROM Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 4.5.4 JTAG Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 4.6 Clock Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Chapter 5 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 5.1 64-QFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Chapter 6 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 SMSC LAN9512/LAN9512i 3 DATASHEET Revision 1.0 (11-24-09) ...

Page 4

... Figure 2.4 Port Power with Ganged Control with Poly Fuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 4.1 Output Equivalent Test Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 4.1 EEPROM Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 4.2 JTAG Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 5.1 LAN9512/LAN9512i 64-QFN Package Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 5.2 LAN9512/LAN9512i Recommended PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Revision 1.0 (11-24-09) USB 2.0 Hub and 10/100 Ethernet Controller ...

Page 5

... Table 4.2 I/O Buffer Characteristics Table 4.3 100BASE-TX Transceiver Characteristics Table 4.4 10BASE-T Transceiver Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 4.5 EEPROM Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 4.6 JTAG Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 4.7 LAN9512/LAN9512i Crystal Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 5.1 LAN9512/LAN9512i 64-QFN Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 6.1 Customer Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 SMSC LAN9512/LAN9512i 5 DATASHEET Revision 1 ...

Page 6

... The LAN9512/LAN9512i hub provides over 30 programmable features, including: PortMap (also referred to as port remap) which provides flexible port mapping and disabling sequences. The downstream ports of the LAN9512/LAN9512i hub can be reordered or disabled in any sequence to support multiple platform designs’ with minimum effort. For any port that is disabled, the LAN9512/LAN9512i automatically reorders the remaining ports to match the USB host controller’ ...

Page 7

... MAC address. 1.1.5 Peripherals The LAN9512/LAN9512i also contains a TAP controller, and provides three PHY LED indicators, as well as eight general purpose I/O pins. All GPIOs can serve as remote wakeup events when LAN9512/LAN9512i suspended state. The integrated IEEE 1149.1 compliant TAP controller provides boundary scan via JTAG. ...

Page 8

... SUSPEND1: Supports GPIO and “Link Status Change” for remote wakeup events. This suspend state consumes less power than SUSPEND0. SUSPEND2: Supports only GPIO assertion for a remote wakeup event. This is the default suspend mode for the LAN9512/LAN9512i. Revision 1.0 (11-24-09) USB 2.0 Hub and 10/100 Ethernet Controller ...

Page 9

... VDD18USBPLL 62 USBRBIAS 63 VDD33A 64 NOTE: When HP Auto-MDIX is activated, the TXN/TXP pins can function as RXN/RXP and vice-versa NOTE: Exposed pad (VSS) on bottom of package must be connected to ground Figure 2.1 LAN9512/LAN9512i 64-QFN Pin Assignments (TOP VIEW) SMSC LAN9512/LAN9512i SMSC LAN9512/LAN9512i 64 PIN QFN (TOP VIEW) VSS 9 ...

Page 10

... This General Purpose I/O pin is fully programmable as either a push-pull output, an open-drain output, OD12 or a Schmitt-triggered input. (PU) 10 DATASHEET USB 2.0 Hub and 10/100 Ethernet Controller Datasheet DESCRIPTION DESCRIPTION This pin should be tied high not used. DESCRIPTION This pin should be tied high not used. SMSC LAN9512/LAN9512i ...

Page 11

... Detect VBUS_DET Upstream VBUS Power 1 Auto-MDIX AUTOMDIX_EN Enable 1 SMSC LAN9512/LAN9512i Table 2.3 Miscellaneous Pins (continued) BUFFER TYPE OD12 This pin is driven low (LED on) when a valid link is detected. This pin is pulsed high (LED off) for (PU) 80mS whenever transmit or receive activity is detected. This pin is then driven low again for a minimum of 80mS, after which time it will repeat the process activity is detected ...

Page 12

... When used as an input, this pin is used to sample the output signal from an external current monitor for downstream USB peripheral 2. An overcurrent condition is indicated when the signal is low. Refer to 12 DATASHEET USB 2.0 Hub and 10/100 Ethernet Controller Datasheet DESCRIPTION DESCRIPTION Section 2.1 for additional information. SMSC LAN9512/LAN9512i ...

Page 13

... P Refer to the LAN9512/LAN9512i reference schematics for connection information. AI Used for the internal bias circuits. Connect to an external 12.4K 1.0% resistor to ground. P Refer to the LAN9512/LAN9512i reference schematics for additional connection information. 13 DATASHEET DESCRIPTION Section 2.1 for additional information. This pin can also be driven by a single- ended clock oscillator ...

Page 14

... No Connect 6 Revision 1.0 (11-24-09) BUFFER TYPE P +3.3V Power Supply for I/O Pins. Refer to the LAN9512/LAN9512i reference schematics for connection information. P +1.8 V power from the internal core voltage regulator. All VDD18CORE pins must be tied together for proper operation. Refer to the LAN9512/LAN9512i reference schematics for connection information ...

Page 15

... VDD33A 26 11 VBUS_DET 27 12 nRESET 28 13 TEST1 29 14 PRTCTL2 30 15 VDD18CORE 31 16 PRTCTL3 32 SMSC LAN9512/LAN9512i PIN PIN NAME NUM PIN NAME NC 33 VDD33IO NC 34 TEST2 VDD33IO 35 GPIO3 nFDX_LED/ 36 GPIO4 GPIO0 nLNKA_LED/ 37 GPIO5 GPIO1 nSPD_LED/ 38 VDD18CORE GPIO2 EECLK 39 VDD33IO EECS 40 TEST3 EEDO ...

Page 16

... Port Power Control Using a USB Power Switch The LAN9512/LAN9512i has a single port power control and over-current sense signal for each downstream port. When disabling port power the driver will actively drive a ‘0’. To avoid unnecessary power dissipation, the internal pull-up resistor will be disabled at that time. When port power is enabled, the output driver is disabled and the pull-up resistor is enabled, creating an open drain output ...

Page 17

... Port Power Control Using a Poly Fuse When using the LAN9512/LAN9512i with a poly fuse, an external diode must be used (See When disabling port power, the driver will drive a ‘0’. This procedure will have no effect since the external diode will isolate the pin from the load. When port power is enabled, the output driver is disabled and the pull-up resistor is enabled, which creates an open drain output ...

Page 18

... Many customers use a single poly fuse to power all their devices. For the ganged situation, all power control pins must be tied together. LAN9512/ LAN9512i Figure 2.4 Port Power with Ganged Control with Poly Fuse Revision 1.0 (11-24-09) PRTCTL3 PRTCTL2 18 DATASHEET USB 2.0 Hub and 10/100 Ethernet Controller Datasheet 5V Poly Fuse USB USB Device Device SMSC LAN9512/LAN9512i ...

Page 19

... Unless otherwise noted in the pin description, internal pull-downs are always enabled. Note: Internal pull-down resistors prevent unconnected inputs from floating. Do not rely on internal resistors to drive signals external to LAN9512/LAN9512i. When connected to a load that must be pulled low, an external resistor must be added. AI Analog input ...

Page 20

... Chapter 3 EEPROM Controller (EPC) LAN9512/LAN9512i may use an external EEPROM to store the default values for the USB descriptors and the MAC address. The EEPROM controller supports most “93C46” type EEPROMs. A total of nine address bits are used to support 256/512 byte EEPROMs. Note: A 3-wire style 2K/4K EEPROM that is organized for 256/512 x 8-bit operation must be used. ...

Page 21

... Config Data Byte 1 Register (CFG1) 27h Config Data Byte 2 Register (CFG2) 28h Config Data Byte 3 Register (CFG3) 29h Non-Removable Devices Register (NRD) 2Ah Port Disable (Self) Register (PDS) 2Bh Port Disable (Bus) Register (PDB) SMSC LAN9512/LAN9512i Table 3.1 EEPROM Format (continued) 21 DATASHEET Revision 1.0 (11-24-09) ...

Page 22

... Table 3.1 EEPROM Format (continued) Table 3.2 Configuration Flags Description DESCRIPTION 00000b 0 = The device does not support remote wakeup The device supports remote wakeup The device Controller is bus powered The device Controller is self powered. 22 DATASHEET USB 2.0 Hub and 10/100 Ethernet Controller Datasheet SMSC LAN9512/LAN9512i ...

Page 23

... Bit 4 = RESERVED Bit Port 3 non-removable Bit Port 2 non-removable Bit Port 1 non-removable Bit 0 is RESERVED, always = 0b Note: Bit 1 must be set firmware for proper identification of the Ethernet Controller as a non-removable device. SMSC LAN9512/LAN9512i Table 3.3 Hub Configuration DESCRIPTION 23 DATASHEET Table 3.3 describes DEFAULT ...

Page 24

... This value also includes the power consumption of a permanently attached peripheral if the hub is configured as a compound device, and the embedded peripheral reports 0mA in its descriptors. Revision 1.0 (11-24-09) Table 3.3 Hub Configuration (continued) DESCRIPTION 24 DATASHEET USB 2.0 Hub and 10/100 Ethernet Controller Datasheet DEFAULT 30h 30h 01h 00h SMSC LAN9512/LAN9512i ...

Page 25

... DP pin. Bit 7 = RESERVED Bit 6 = RESERVED Bit 5 = RESERVED Bit 4 = RESERVED Bit Port 3 DP/DM is swapped Bit Port 2 DP/DM is swapped Bit 1 = RESERVED Bit Upstream Port DP/DM is swapped SMSC LAN9512/LAN9512i Table 3.3 Hub Configuration (continued) DESCRIPTION 25 DATASHEET DEFAULT 01h 00h 32h 00h for details ...

Page 26

... All others RESERVED Physical Port 1 is Disabled Physical Port 1 is mapped to Logical Port 1 Physical Port 1 is mapped to Logical Port 2 Physical Port 1 is mapped to Logical Port 3 All others RESERVED 26 DATASHEET USB 2.0 Hub and 10/100 Ethernet Controller Datasheet DEFAULT 21h SMSC LAN9512/LAN9512i ...

Page 27

... RESERVED 39h Status/Command Register (STCD) Refer to Table 3.9, “Status/Command Register (STCD) Format,” on page 31 details. Note 3.1 Default value is dependent on device revision. SMSC LAN9512/LAN9512i Table 3.3 Hub Configuration (continued) DESCRIPTION bit in Config Data Byte 3 Register (CFG3) - RESERVED Physical Port 3 is Disabled ...

Page 28

... This is a rarely used feature in the PC environment, existing drivers may not have been thoroughly debugged with this feature enabled included because permitted feature in Chapter 11 of the USB specification. Revision 1.0 (11-24-09) USB 2.0 Hub and 10/100 Ethernet Controller DESCRIPTION 28 DATASHEET Datasheet DEFAULT SMSC LAN9512/LAN9512i ...

Page 29

... Allows the OEM to indicate that the Hub is part of a compound (see the USB Specification for definition) device. The applicable port(s) must also be defined as having a “Non-Removable Device” Yes, Hub is part of a compound device 2:0 RESERVED SMSC LAN9512/LAN9512i DESCRIPTION DESCRIPTION 29 DATASHEET DEFAULT 01b ...

Page 30

... Elevated electrical drive strength (+4% boost Elevated electrical drive strength (+8% boost Elevated electrical drive strength (+12% boost) Revision 1.0 (11-24-09) USB 2.0 Hub and 10/100 Ethernet Controller DESCRIPTION DESCRIPTION DESCRIPTION 30 DATASHEET Datasheet DEFAULT 0h 0b 000b DEFAULT 000000b 00b DEFAULT 00b 00b SMSC LAN9512/LAN9512i ...

Page 31

... Hub will signal a USB attach event to an upstream device, and the internal memory (address range 00h - FEh) is “write-protected” to prevent unintentional data corruption. Note: This bit is write once and is only cleared by assertion of the external nRESET or POR. SMSC LAN9512/LAN9512i DESCRIPTION DESCRIPTION 31 DATASHEET DEFAULT ...

Page 32

... EEPROM. A software reset (SRST EEPROM Reload Command causes the EEPROM contents related solely to the Ethernet Controller to be loaded. Revision 1.0 (11-24-09) USB 2.0 Hub and 10/100 Ethernet Controller Table Table 3.10 EEPROM Defaults FIELD DEFAULT VALUE FFFFFFFFFFFFh 01h 04h 05h 01h 0424h EC00h 32 DATASHEET Datasheet 3.10. SMSC LAN9512/LAN9512i ...

Page 33

... EEPROM is formatted. OFFSET BYTE 0000h 0008h 0010h 0018h 0020h 0028h 0030h 0038h 0040h 0048h 0050h 0058h 0060h 0068h 0070h 0078h 0080h 0088h 0090h - 00FFh SMSC LAN9512/LAN9512i provide an example of how the contents of a EEPROM are formatted. Table 3.11 Dump of EEPROM Memory VALUE .................... ...

Page 34

... Full-Speed Device Descriptor Word Offset (34h) Corresponds to EEPROM Byte Offset 68h Full-Speed Configuration and Interface Descriptor Length (18bytes) Full-Speed Configuration and Interface Descriptor Word Offset (3Dh) Corresponds to EEPROM Byte Offset 7Ah RESERVED RESERVED Vendor ID LSB Register (VIDL) 34 DATASHEET Datasheet SMSC LAN9512/LAN9512i ...

Page 35

... SMSC LAN9512/LAN9512i DESCRIPTION Vendor ID MSB Register (VIDM) Product ID LSB Register (PIDL) Product ID MSB Register (PIDM) Device ID LSB Register (DIDL) Device ID MSB Register (DIDM) Config Data Byte 1 Register (CFG1) Config Data Byte 2 Register (CFG2) Config Data Byte 3 Register (CFG3) ...

Page 36

... Number of Endpoints used for this interface (Less endpoint 0) Class Code Subclass Code Protocol Code Index of String Descriptor Describing this interface Size of Full-Speed Device Descriptor in Bytes (18 Bytes) Descriptor Type (Device Descriptor - 01h) USB Specification Number that the device complies with (0200h) 36 DATASHEET Datasheet SMSC LAN9512/LAN9512i ...

Page 37

... FF 89h 00 8Ah FF 8Bh 00 8Ch-FFh - SMSC LAN9512/LAN9512i DESCRIPTION Class Code Subclass Code Protocol Code Maximum Packet Size for Endpoint 0 Vendor ID (0424h) Product ID (EC00h) Device Release Number (0100h) Index of Manufacturer String Descriptor Index of Product String Descriptor Index of Serial Number String Descriptor ...

Page 38

... Note, device signals are NOT 5 volt tolerant unless specified otherwise. 4.2 Operating Conditions** Supply Voltage (VDD33A, VDD33BIAS, VDD33IO .+3.3V +/- 300mV Ambient Operating Temperature in Still Air (T **Proper operation of LAN9512/LAN9512i is guaranteed only within the ranges specified in this section. Revision 1.0 (11-24-09) (Note 4. .0V to +3.6V (Note (Note ) ...

Page 39

... Full Duplex (USB Full-Speed) Supply current (VDD33IO, VDD33A) Power Dissipation (Device Only) Note: All values measured with maximum simultaneous traffic on the Ethernet port and all USB ports. Note: Magnetic power consumption: 100BASE-TX: ~42mA 10BASE-T: ~104mA SMSC LAN9512/LAN9512i MIN TYPICAL 231 763 188 621 ...

Page 40

... V Schmitt trigger 1.8 V Schmitt trigger 485 Note 4.6 2 5.5 V 1.35 V Schmitt trigger 1.8 V Schmitt trigger 485 Note 4.6 120 uA Note 4.6, Note 4.7 3 8mA -8mA OH 0 8mA OL 0 12mA -12mA OH 0 12mA OL Note 4.8 0.5 V 3.6 V SMSC LAN9512/LAN9512i ...

Page 41

... Note 4.10 Offset from 16nS pulse width at 50% of pulse peak. Note 4.11 Measured differentially. Table 4.4 10BASE-T Transceiver Characteristics PARAMETER Transmitter Peak Differential Output Voltage Receiver Differential Squelch Threshold Note 4.12 Min/max voltages guaranteed as measured with 100Ω resistive load. SMSC LAN9512/LAN9512i SYMBOL MIN TYP MAX V 950 ...

Page 42

... AC Specifications This section details the various AC timing specifications of the LAN9512/LAN9512i. Note: The USBDP and USBDM pin timing adheres to the USB 2.0 specification. Refer to the Universal Serial Bus Revision 2.0 specification for detailed USB timing information. 4.5.1 Equivalent Test Load Output timing specifications assume the 25pF equivalent test load illustrated in OUTPUT 4 ...

Page 43

... USB 2.0 Hub and 10/100 Ethernet Controller Datasheet 4.5.3 EEPROM Timing The following specifies the EEPROM timing requirements for LAN9512/LAN9512i: EECS t EECLK EEDO EEDI EEDI (VERIFY) SYMBOL DESCRIPTION t EECLK Cycle time ckcyc t EECLK High time ckh t EECLK Low time ckl t EECS high before rising edge of EECLK ...

Page 44

... Revision 1.0 (11-24-09) t tckp t tckhl TCK (Input dov t doh TDO (Output) Figure 4.2 JTAG Timing Table 4.6 JTAG Timing Values MIN 66.67 t *0.4 tckp DATASHEET USB 2.0 Hub and 10/100 Ethernet Controller Datasheet t tckhl t h MAX UNITS NOTES ns t *0.6 ns tckp SMSC LAN9512/LAN9512i ...

Page 45

... Datasheet 4.6 Clock Circuit LAN9512/LAN9512i can accept either a 25MHz crystal (preferred 25MHz single-ended clock oscillator (+/- 50ppm) input. If the single-ended clock oscillator method is implemented, XO should be left unconnected and XI should be driven with a nominal 0-3.3V clock signal. The input clock duty cycle is 40% minimum, 50% typical and 60% maximum. ...

Page 46

... Chapter 5 Package Outline 5.1 64-QFN Package Figure 5.1 LAN9512/LAN9512i 64-QFN Package Definition Table 5.1 LAN9512/LAN9512i 64-QFN Dimensions MIN NOMINAL A 0.80 0.85 A1 0.00 0. 0.65 D/E 8.90 9.00 D1/E1 8.65 8.75 D2/E2 7.20 7.30 L 0.30 0.40 b 0.18 0.25 e 0.50 BSC K 0.35 - Revision 1.0 (11-24-09) USB 2 ...

Page 47

... Dimension “b” applies to plated terminals and is measured between 0.15 and 0.30 mm from the terminal tip. 3. Details of terminal #1 identifier are optional, but must be located within the area indicated. The terminal #1 identifier may be either a mold or marked feature. Figure 5.2 LAN9512/LAN9512i Recommended PCB Land Pattern SMSC LAN9512/LAN9512i 47 DATASHEET Revision 1 ...

Page 48

... Added JTAG timing information Added ESD information. and Cover Updated supported EEPROM information. Added power consumption values. Added input capacitance and leakage values. Fixed various typos. Initial Release 48 DATASHEET USB 2.0 Hub and 10/100 Ethernet Controller Datasheet CORRECTION SMSC LAN9512/LAN9512i ...

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