78Q8430-128CGTR/F Maxim Integrated Products, 78Q8430-128CGTR/F Datasheet - Page 36

• Manufacturer Part Number: 78Q8430-128CGTR/F
• Description: Telecom ICs 10/100MAC+PHY MULTI MEDIA OFFLOAD CNTRLR
• Manufacturer: Maxim Integrated Products

78Q8430 Data Sheet
STEP 4. Enable the filter. The unicast address filter is enabled by setting the Previous Hit Mask field of
An address filter can be simply activated/deactivated by toggling the value of the Previous Hit Mask field
for the byte [0] CAM rule between 0x7F and 0x00 respectively. The promiscuous mode filter, filter #0,
should not be deactivated in this way.
6.7.1.4
The default CAM rule set supports four multicast address filters. The first, multicast filter #0, serves the same
purpose as the promiscuous mode filter except it applies only to multicast addresses. The last, multicast filter
#3, is the broadcast filter and is reserved for that purpose. The second, multicast filter #1, is the PAUSE filter
and is setup by default to match the PAUSE address. Multicast filter #2 is unused by default and available for
general use. Each filter has two components, the 48-bit address that it matches and a mask that defines
which bits of the address are relevant and which bits are wildcards. Each byte of each address filter has a
CAM rule assigned to it. Table 25 summarizes the association of multicast filter bytes and CAM rules.
Note: Bytes are in network transmit order starting with Byte [0].
For an arbitrary multicast filter number N, the following procedure should be used to set the address and
mask values:
STEP 1. Write address and mask byte [0] to CAM rule 0x7C+N as follows.
36
M/C Filter #3
M/C Filter #2
M/C Filter #1
1
LSBs are not set then the address is not multicast and belongs in the unicast filter set.
It is important that STEP 1 deactivates the filter so that no frames are filtered using a partial filter
setting before all relevant rules are written. Step 4 reactivates the filter once the new settings are in
place.
The LSB of both address byte [0] and mask byte [0] must be set for multicast address filters. If the
CAR
RMR
RCR
Reg.
the CAM rule for byte [0] to 0x7F. This step must be done last to prevent an ingressing frame
from matching a partial set of filter rules. All the rules for a filter must be in place before
enabling the filter.
Multicast Address Filters
ADDR
Data Match
Data Mask
Previous Hit Match
Previous Hit Mask
Byte Offset
Interrupt
Control Logic Action
Match Control
Byte [0]
0x7E
0x7D
0x7F
Table 25: CAM Rules Associated with Multicast Filter Bytes
Field
Byte [1]
0x67
0x66
0x65
0x7C+N
Value of MAC address byte [0]
Value of mask byte [0]
0x00 to disable the filter
0x00
Retain default: 0x00
Retain default: 0
SETMC
Retain default: MD
Byte [2]
0x63
0x62
0x61
1
Value to write
Byte [3]
0x4E
0x4D
0x4F
1
Byte [4]
0x4B
0x4A
0x49
DS_8430_001
Byte [5]
0x3D
0x3F
0x3E
Rev. 1.2