LPC47M112-MW SMSC, LPC47M112-MW Datasheet - Page 152
LPC47M112-MW
Manufacturer Part Number
LPC47M112-MW
Description
Ethernet ICs Enhanced Super I/O Cntrl LPC Interface
Manufacturer
SMSC
Datasheet
1.LPC47M112-MW.pdf
(204 pages)
Specifications of LPC47M112-MW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Enhanced Super I/O Controller with LPC Interface
Datasheet
SMSC DS – LPC47M112
FAN2
Default = 0x00
on VTR POR
Fan Control
Default = 0x50
on VTR POR
Fan1 Tachometer
Register
Default = 0x00
on VTR POR
NAME
REG OFFSET
(R/W)
(R/W)
(hex)
(R)
57
58
59
DATASHEET
FAN Register 2
Bit[0] Fan Control
Bit[6:1] Duty Cycle Control for FAN2
Control the duty cycle of the FAN2 pin
Bit[7] Fan 2 Clock Select
This bit is used with the Fan 2 Clock Source Select and
the Fan 2 Clock Multiplier bits in the Fan Control register
(0x58) to determine the fan speed F
Modes for Fan” in “Fan Speed Control and Monitoring”
section.
The fan speed may be doubled through bit 3 of Fan
Control Register at 0x58.
Fan Control Register
Bit[0] Fan 1 Clock Source Select
This bit and the Fan 1 Clock Multiplier bit is used with The
Fan 1 Clock Select bit in the Fan 1 register (0x56) to
determine the fan speed F
Fan” table (Table 50) in “Fan Speed Control and
Monitoring” section.
Bit[1] Fan 2 Clock Source Select
This bit and the Fan 2 Clock Multiplier bit is used with The
Fan 2 Clock Select bit in the Fan 2 register (0x57) to
determine the fan speed F
Fan” table (Table 50) in “Fan Speed Control and
Monitoring” section.
Bit[2] Fan 1 Clock multiplier
register and bit 7 of the FAN1
Bit[3] Fan 2 Clock multiplier
register and bit 7 of the FAN2 register
Bit[5:4] The FAN1 count divisor. Clock scalar for adjusting
the tachometer count. Default = 2.
Bit[7:6] The FAN2 count divisor. Clock scalar for adjusting
the tachometer count. Default = 2.
Fan Tachometer Register 1
Bit]7:0] The 8-bit FAN1 tachometer count. The number of
counts of the internal clock per pulse of the fan. The count
value is computed from Equation 1. This value is the final
(maximum) count of the previous pulse (latched). The
value in this register may not be valid for up to 2 pulses
following a write to the preload register.
Page 152
1=FAN2 pin is high
0=bits[6:1] control the duty cycle of the
FAN2 pin.
000000 = pin is low
100000 = 50% duty cycle
111111 = pin is high for 63, low for 1
0=No multiplier used
1=Double the fan speed selected by bit 0 of this
register
0=No multiplier used
1=Double the fan speed selected by bit 1 of this
00: divisor = 1
01: divisor = 2
10: divisor = 4
11: divisor = 8
00: divisor = 1
01: divisor = 2
10: divisor = 4
11: divisor = 8
DESCRIPTION
OUT
OUT
.
.
See “Different Modes for
See “Different Modes for
OUT
.
See “Different
Rev. 02-16-07
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