LAN9500AI-ABZJ SMSC, LAN9500AI-ABZJ Datasheet
LAN9500AI-ABZJ
Specifications of LAN9500AI-ABZJ
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LAN9500AI-ABZJ Summary of contents
Page 1
... Preamble generation and removal — Automatic 32-bit CRC generation and checking — Automatic payload padding and pad removal — Loop-back modes — TCP/UDP/IP/ICMP checksum offload support 1 = LAN9500A/LAN9500Ai only SMSC LAN950x Family LAN9500/LAN9500i LAN9500A/LAN9500Ai USB 2.0 to 10/100 Ethernet Controller — Flexible address filtering modes – ...
Page 2
... LAN9500i-ABZJ for 56-pin, QFN lead-free RoHS compliant package (-40 to +85°C temp range) LAN9500A-ABZJ for 56-pin, QFN lead-free RoHS compliant package (0 to +70°C temp range) LAN9500Ai-ABZJ for 56-pin, QFN lead-free RoHS compliant package (-40 to +85°C temp range) This product meets the halogen maximum concentration values per IEC61249-2-21 ...
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... EEPROM Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 EEPROM Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.3 EEPROM Auto-Load 5.4 Examples of EEPROM Format Interpretation 5.4.1 LAN9500/LAN9500i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.4.2 LAN9500A/LAN9500Ai . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.5 Customized Operation Without EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Chapter 6 PME Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Chapter 7 NetDetach Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Chapter 8 Operational Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 8.1 Absolute Maximum Ratings 8.2 Operating Conditions 8.3 Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 8 ...
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... Chapter 9 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Chapter 10 Datasheet Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Revision 1.0 (05-17-10) USB 2.0 to 10/100 Ethernet Controller 4 DATASHEET Datasheet SMSC LAN950x Family ...
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... Figure 8.5 MII Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 8.6 MII Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Figure 8.7 Turbo MII Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Figure 8.8 Turbo MII Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Figure 9.1 LAN950x 56-QFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 9.2 LAN950x 56-QFN Recommended PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 SMSC LAN950x Family 5 DATASHEET Revision 1.0 (05-17-10) ...
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... Table 5.4 EEPROM Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 5.5 Dump of EEPROM Memory - LAN9500/LAN9500i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 5.6 EEPROM Example - 256 Byte EEPROM - LAN9500/LAN9500i . . . . . . . . . . . . . . . . . . . . . . . 31 Table 5.7 Dump of EEPROM Memory - LAN9500A/LAN9500Ai Table 5.8 EEPROM Example - 256 Byte EEPROM - LAN9500A/LAN9500Ai . . . . . . . . . . . . . . . . . . . . 36 Table 8.1 Power Consumption/Dissipation - SUSPEND0 (LAN9500/LAN9500i Table 8.2 Power Consumption/Dissipation - SUSPEND0 (LAN9500A/LAN9500Ai Table 8 ...
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... X X LAN9500Ai X X The LAN9500/LAN9500i and LAN9500A/LAN9500Ai are pin compatible. However, the value of the required EXRES resistor and other system components differ between devices. Refer to the LAN950x reference schematics for additional information. SMSC LAN950x Family Table 1.1 provides a summary of the feature differences between family Table 1 ...
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... For LAN9500A/LAN9500Ai: 0 Ohm 49.9 49.9 49.9 49.9 Ohm Ohm Ohm Ohm Ethernet Magnetics/RJ45 R2 For LAN9500/LAN9500i: 12.4K Ohm 1% For LAN9500A/LAN9500Ai: 12.0K Ohm 1% For LAN9500/LAN9500i: 1M Ohm 1% For LAN9500A/LAN9500Ai: Do Not Populate R3 25.000MHz 33pF 33pF 8 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet To Ethernet SMSC LAN950x Family ...
Page 9
... Packet", "Wake On LAN", and "Link Status Change" wake events. These wake events can be programmed to initiate a USB remote wakeup. An internal EEPROM controller exists to load various USB configuration information and the device MAC address. The integrated IEEE 1149.1 compliant TAP controller provides boundary scan via JTAG. SMSC LAN950x Family 10/100 FIFO Ethernet ...
Page 10
... On LAN” and “Magic Packet” frames. This suspend state consumes power at a level similar to the NORMAL state, however, it allows for power savings in the Host CPU. Note 2.1 All four SUSPEND states are supported by LAN9500A/LAN9500Ai. SUSPEND3 is not supported by LAN9500/LAN9500i. Revision 1.0 (05-17-10) (Note 2 ...
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... The EEPROM can be configured to load USB descriptors, USB device configuration, and MAC address. Custom operation without EEPROM is also provided (LAN9500A/LAN9500Ai only). 2.1.7 General Purpose I/O When configured for internal PHY mode eleven GPIOs are supported. All GPIOs can serve as remote wakeup events when the LAN950x suspended state ...
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... TXD1/GPIO5/RMT_WKP 55 TXD0/GPIO4/EEP_DISABLE 56 Note: ** This pin is a no-connect (NC) for LAN9500A/LAN9500Ai, but may be connected to VDD33A for backward compatibility with LAN9500/LAN9500i. Note: *** For LAN9500A/LAN9500Ai this pin provides additional PME related functionality. Refer to the respective pin descriptions and information. Note: **** For LAN9500A/LAN9500Ai GPIO7 may provide additional PHY Link Up related functionality ...
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... This pin may be used to signal PME when Internal PHY and PME modes of operation are in effect. Refer to Chapter 6, "PME Operation," on page 40 for additional information. (LAN9500A/LAN9500Ai only) This pin may serve as the PME_MODE_SEL input when Internal PHY and PME modes of operation are in effect. Refer to Chapter 6, "PME Operation," ...
Page 14
... Note 3.1 configuration straps. 14 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet DESCRIPTION (LAN9500A/LAN9500Ai ONLY): GPIO7 may provide additional PHY Link Up related functionality. A 3-wire style 1K/2K/4K EEPROM that is organized for 128 x 8-bit or 256/512 x 8-bit operation must be used. for more information on for more information on ...
Page 15
... Configuration strap values are latched on power-on reset and system reset. Configuration straps are identified by an underlined symbol name. Signals that function as configuration straps must be augmented with an external resistor when connected to a load. SMSC LAN950x Family Table 3.1 MII Interface Pins (continued) BUFFER ...
Page 16
... The EECS output may tri-state briefly during power-up. Some EEPROM devices may be prone to false selection during this time. When an EEPROM is used, an external pull-down resistor is recommended on this signal to prevent false selection. Refer to your EEPROM manufacturer’s datasheet for additional information. for more information on SMSC LAN950x Family ...
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... PHY Mode) JTAG Test Data Input (Internal PHY Mode) 1 Receive Data 3 (External PHY Mode) SMSC LAN950x Family Table 3.3 JTAG Pins BUFFER SYMBOL TYPE nTRST IS In internal PHY mode, this active-low pin functions as the JTAG test port reset input. (PU) RXD0 ...
Page 18
... Refer to Chapter 6, "PME Operation," on page 40 for additional information. By default this pin is configured as a GPIO. (LAN9500A/LAN9500Ai only) This pin may serve as the PME_MODE_SEL input when External PHY and PME modes of operation are in effect. Refer to Chapter 6, "PME Operation," on page 40 for additional information ...
Page 19
... Refer to Chapter 6, "PME Operation," on page 40 for additional information. By default this pin is configured as a GPIO. (LAN9500A/LAN9500Ai only) This pin may be used to signal bus power availability when PME mode of operation is in effect. Refer to Chapter 6, "PME Operation," on page 40 for additional information. ...
Page 20
... The functionality of this pin may be swapped to USB DMINUS via the PORT_SWAP configuration strap. Chapter 4, "Power Connections," on and the device reference schematic for This pin can also be driven by a single- ended clock oscillator. When this method is used, XO should be left unconnected DESCRIPTION SMSC LAN950x Family ...
Page 21
... P Refer to the device reference schematic for connection information. Note: EXRES AI Used for the internal bias circuits. Connect to an external resistor to ground. For LAN9500A/LAN9500Ai use 12.0K, 1%. For LAN9500/LAN9500i use 12.4K, 1%. VDDPLL P This pin must be connected to VDDCORE for proper operation. Refer to page 24 additional connection information. ...
Page 22
... TEST2 Note 3.3 This pin is a no-connect (NC) for LAN9500A/LAN9500Ai, but may be connected to VDD33A for backward compatibility with LAN9500/LAN9500i. Note 3.4 For LAN9500A/LAN9500Ai this pin provides additional PME related functionality. Refer to the respective pin descriptions and information. Revision 1.0 (05-17-10) PIN ...
Page 23
... When connected to a load that must be pulled low, an external resistor must be added. AI Analog input AIO Analog bi-directional ICLK Crystal oscillator input pin OCLK Crystal oscillator output pin P Power pin SMSC LAN950x Family Table 3.10 Buffer Types DESCRIPTION 23 DATASHEET Revision 1.0 (05-17-10) ...
Page 24
... Internal Core Regulator (IN) (OUT) Core Logic PLL & Ethernet PHY USB PHY Figure 4.1 Power Connections 24 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet VDDCORE VDDCORE 1 F 0.1 ESR 0.5A 120 @ 100MHz VDDPLL 0.1 F 0.5A 120 @ 100MHz VDDUSBPLL 0.1 F SMSC LAN950x Family ...
Page 25
... MAC Address [23:16] 04h MAC Address [31:24] 05h MAC Address [39:32] 06h MAC Address [47:40] 07h Full-Speed Polling Interval for Interrupt Endpoint 08h Hi-Speed Polling Interval for Interrupt Endpoint SMSC LAN950x Family Table 5.1 EEPROM Format EEPROM CONTENTS 25 DATASHEET Revision 1.0 (05-17-10) ...
Page 26
... Only) GPIO PME Flags Note: EEPROM byte addresses past the indicated address can be used to store data for any purpose: LAN9500/LAN9500i - 1Dh LAN9500A/LAN9500Ai - 20h Revision 1.0 (05-17-10) Table 5.1 EEPROM Format (continued) Bits 7:3 Unused. 26 DATASHEET USB 2.0 to 10/100 Ethernet Controller ...
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... Elevated electrical drive strength (+12% boost). 3 RESERVED 2 Remote Wakeup Support 0 = The device does not support remote wakeup The device supports remote wakeup. 1 (LAN9500A/LAN9500Ai Only, Otherwise RESERVED) LED Select This bit determines the functionality of external LED pins. BIT VALUE PIN NAME nSPD_LED 0 nLNKA_LED ...
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... Table 5.3 describes the GPIO PME flags (LAN9500A/LAN9500Ai Only). BITS 7 GPIO PME Enable Setting this bit enables the assertion of the GPIO0 or GPIO8 pin result of a Wakeup (GPIO) pin, Magic Packet, or PHY Link Up. The host processor may use the GPIO0/GPIO8 pin to asynchronously wake up manner analogous to a PCI PME pin ...
Page 29
... Note: The Configuration Flags are affected by the PWR_SEL and RMT_WKP straps. SMSC LAN950x Family Table 5.3 GPIO PME Flags (continued) DESCRIPTION is 0, this bit is ignored. Table 5.4 EEPROM Defaults DEFAULT VALUE FFFFFFFFFFFFh 0424h DEVICE LAN9500/LAN9500i LAN9500A/LAN9500Ai 29 DATASHEET Table 5.4. 01h 04h 04h FAh PRODUCT ID 9500h 9E00h Revision 1 ...
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... Revision 1.0 (05-17-10) provide an example of how the contents of a EEPROM are formatted in the Table 5 dump of the EEPROM memory (256-byte EEPROM), while VALUE .............................................. 30 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family ...
Page 31
... SMSC LAN950x Family DESCRIPTION EEPROM Programmed Indicator MAC Address Full-Speed Polling Interval for Interrupt Endpoint (1ms) Hi-Speed Polling Interval for Interrupt Endpoint (4ms) Configuration Flags - The device is bus powered and supports remote wakeup. Language ID Descriptor 0409h, English ...
Page 32
... FA 63h 09 Revision 1.0 (05-17-10) DESCRIPTION Manufacturer ID String (“SMSC” in UNICODE) Size of Product Name String Descriptor (16 bytes) Descriptor Type (String Descriptor - 03h) Product Name String (“LAN9500” in UNICODE) Size of Serial Number String Descriptor (16 bytes) Descriptor Type (String Descriptor - 03h) Serial Number String (“0005123” in UNICODE) ...
Page 33
... A0 86h FA 87h 09 SMSC LAN950x Family DESCRIPTION Descriptor Type (Interface Descriptor - 04h) Number identifying this Interface Value used to select alternative setting Number of Endpoints used for this interface (Less endpoint 0) Class Code Subclass Code Protocol Code Index of String Descriptor Describing this interface ...
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... Value used to select alternative setting Number of Endpoints used for this interface (Less endpoint 0) Class Code Subclass Code Protocol Code Index of String Descriptor Describing this interface Data storage for use by Host as desired 34 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family ...
Page 35
... USB 2.0 to 10/100 Ethernet Controller Datasheet 5.4.2 LAN9500A/LAN9500Ai Table 5.7 and Table 5.8 case of LAN9500A/LAN9500Ai. while Table 5.8 illustrates, byte by byte, how the EEPROM is formatted. Table 5.7 Dump of EEPROM Memory - LAN9500A/LAN9500Ai OFFSET BYTE 0000h 0008h 0010h 0018h 0020h 0028h 0030h 0038h ...
Page 36
... Table 5.8 EEPROM Example - 256 Byte EEPROM - LAN9500A/LAN9500Ai EEPROM EEPROM CONTENTS ADDRESS (HEX) 00h A5 01h - 06h 07h 01 08h 04 09h 04 0Ah - 0Bh 09 04 0Ch 0A 0Dh 11 0Eh 12 0Fh 16 10h 10 11h 1F 12h 00 13h 00 14h 00 15h 00 16h 12 17h 27 18h 12 19h 30 1Ah 12 1Bh 39 1Ch 12 1Dh 42 1Eh ...
Page 37
... USB 2.0 to 10/100 Ethernet Controller Datasheet Table 5.8 EEPROM Example - 256 Byte EEPROM - LAN9500A/LAN9500Ai (continued) EEPROM EEPROM CONTENTS ADDRESS (HEX) 20h 8A 21h 00 22h 0A 23h 03 24h - 2Bh 2Ch 12 2Dh 03 2Eh - 3Dh 3Eh 10 3Fh 03 40h - 4Dh 4Eh 12 4Fh 01 50h - 51h 00 02 52h FF 53h ...
Page 38
... Table 5.8 EEPROM Example - 256 Byte EEPROM - LAN9500A/LAN9500Ai (continued) EEPROM EEPROM CONTENTS ADDRESS (HEX) 65h 01 66h 00 67h A0 68h FA 69h 09 6Ah 04 6Bh 00 6Ch 00 6Dh 03 6Eh FF 6Fh 00 70h FF 71h 00 72h 12 73h 01 74h - 75h 00 02 76h FF 77h 00 78h FF 79h 40 7Ah - 7Bh 24 04 7Ch - 7Dh ...
Page 39
... USB 2.0 to 10/100 Ethernet Controller Datasheet Table 5.8 EEPROM Example - 256 Byte EEPROM - LAN9500A/LAN9500Ai (continued) EEPROM EEPROM CONTENTS ADDRESS (HEX) 89h 01 8Ah 00 8Bh A0 8Ch FA 8Dh 09 8Eh 04 8Fh 00 90h 00 91h 03 92h FF 93h 00 94h FF 95h 00 96h - FFh - 5.5 Customized Operation Without EEPROM Customized operation without EEPROM is supported only by LAN9500A/LAN9500Ai. ...
Page 40
... Chapter 6 PME Operation PME Operation is supported only by LAN9500A/LAN9500Ai. The device provides a mechanism for waking up a host system via PME mode of operation. PME signaling is only available while the device is operating in the self powered mode. a typical application using LAN9500A/LAN9500Ai. Enable Embedded Controller Revision 1.0 (05-17-10) ...
Page 41
... Note: When in PME mode, nRESET or POR will always cause the contents of the EEPROM to be reloaded. Note: GPIO10 may be used in PME and External PHY mode to connect to an external PHY’s Link LED, in order to generate a PHY Link Up wake event. SMSC LAN950x Family Figure 6.1 assumes that the Host Processor and the Chipset are powered or GPIO7:0 Wakeup Enables Enables ...
Page 42
... Note: A POR occurring when PME_MODE_SEL = 1 and an EEPROM present with the GPIO PME Enable set results in the device entering PME Mode. Revision 1.0 (05-17-10 (enabled (PME signaled via level on GPIO pin (NA (high level signals event (Push-Pull (Magic Packet wakeup (Active-low detection) 42 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family ...
Page 43
... Device Has EEPROM With GPIO PME Enable =1, Enters PME Mode Wakeup Event Detected Device Asserts PME EC To Wake System To Process Wakeup Event? EC Asserts PME_CLEAR Device Resets And Deasserts PME SMSC LAN950x Family Or Via Circuitry False By Device? True EC Detects PME Yes No EC Signals Enable To Host ...
Page 44
... Chapter 7 NetDetach Operation NetDetach operation is supported only by LAN9500A/LAN9500Ai NetDetach is a mode of operation where the device detaches from the USB bus after the Ethernet cable is disconnected. This is advantageous for mobile devices attached USB device may prevent the Host CPU from entering the APCI C3 state. Allowing the CPU to enter the C3 state maximizes battery life, as the C3 state is the lowest of the four APCI power states ...
Page 45
... USB 2.0 to 10/100 Ethernet Controller Datasheet Ethernet SMSC LAN9500A/ LAN9500Ai SMSC LAN950x Family 1 Insert Ethernet Cable 2 USB Electricals Attach LAN9500A enumerates and 3 the driver is loaded Figure 7.2 Device Attach 45 DATASHEET Revision 1.0 (05-17-10) ...
Page 46
... Note 8 +70 Note 8.5 +/-8kV for LAN9500/LAN9500i, +/-5kV for LAN9500A/LAN9500Ai Note 8.6 Performed by independent 3rd party test facility. *Stresses exceeding those listed in this section could cause permanent damage to the device. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Functional operation of the device at any condition exceeding those indicated in Section 8.2, " ...
Page 47
... Table 8.1 Power Consumption/Dissipation - SUSPEND0 (LAN9500/LAN9500i) PARAMETER Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) Table 8.2 Power Consumption/Dissipation - SUSPEND0 (LAN9500A/LAN9500Ai) PARAMETER Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) ...
Page 48
... Table 8.5 Power Consumption/Dissipation - SUSPEND2 (LAN9500/LAN9500i) PARAMETER Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) Table 8.6 Power Consumption/Dissipation - SUSPEND2 (LAN9500A/LAN9500Ai) PARAMETER Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) Note: SUSPEND2 power consumption/dissipation values were measured in bus-powered mode ...
Page 49
... USB 2.0 to 10/100 Ethernet Controller Datasheet 8.3.4 SUSPEND3 Note: SUSPEND3 not supported by LAN9500/LAN9500i. Table 8.7 Power Consumption/Dissipation - SUSPEND3 (LAN9500A/LAN9500Ai) PARAMETER Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) 8.3.5 Operational Table 8.8 Operational Power Consumption/Dissipation (LAN9500/LAN9500i) ...
Page 50
... Table 8.10 CEB Operational Current Consumption (LAN9500/LAN9500i) PARAMETER 100BASE-TX Full Duplex (USB High-Speed) Total SMSC Customer Evaluation Board Current Consumption Table 8.11 CEB Operational Current Consumption (LAN9500A/LAN9500Ai) PARAMETER 100BASE-TX Full Duplex (USB High-Speed) Total SMSC Customer Evaluation Board Current Consumption ***Total system current consumption as measured on the 5V USB VBUS input to a bus-powered Customer Evaluation Board, where VBUS = 5 ...
Page 51
... ICLK Type Buffer (XI Input) Low Input Level V High Input Level V Note 8.7 This specification applies to all inputs and tri-stated bi-directional pins. Internal pull-down and pull-up resistors add +/- 50uA per-pin (typical). SMSC LAN950x Family Table 8.12 I/O Buffer Characteristics MIN TYP -0.3 ILI IHI 1.01 1 ...
Page 52
... OS SYMBOL MIN TYP MAX V 2.2 2.5 OUT V 300 420 585 DS 52 DATASHEET Datasheet UNITS NOTES mVpk Note 8.10 mVpk Note 8.10 % Note 8.10 5.0 nS Note 8.10 0.5 nS Note 8. Note 8. 1.4 nS Note 8.12 UNITS NOTES 2.8 V Note 8.13 mV SMSC LAN950x Family ...
Page 53
... Universal Serial Bus Revision 2.0 specification for detailed USB timing information. 8.5.1 Equivalent Test Load Output timing specifications assume the 25pF equivalent test load illustrated in unless otherwise specified. OUTPUT SMSC LAN950x Family 25 pF Figure 8.1 Output Equivalent Test Load 53 DATASHEET Figure 8.1 below, Revision 1 ...
Page 54
... Figure 8.2 Power-On Configuration Strap Valid Timing Table 8.15 Power-On Configuration Strap Valid Timing SYMBOL t Configuration strap valid time cfg Revision 1.0 (05-17-10) 2.0V t cfg DESCRIPTION 54 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet MIN TYP MAX UNITS 15 mS SMSC LAN950x Family ...
Page 55
... Configuration strap pins setup to nRESET deassertion css t Configuration strap pins hold after nRESET deassertion csh t Output drive after deassertion odad SMSC LAN950x Family t rstia t t css csh t odad Figure 8.3 nRESET Reset Pin Timing DESCRIPTION 55 DATASHEET ...
Page 56
... Figure 8.4 EEPROM Timing Table 8.17 EEPROM Timing Values MIN 1110 550 550 1070 30 550 550 90 0 580 0 1070 56 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t csl t cklcsl t ckldis t dhcsl TYP MAX UNITS 1130 ns 570 ns 570 600 SMSC LAN950x Family ...
Page 57
... TXD[3:0], TXEN output valid from rising edge of val TXCLK t TXD[3:0], TXEN output hold from rising edge of hold TXCLK Note 8.14 Timing was designed for system load between 10 pf and 25 pf. SMSC LAN950x Family t clkp t t clkh clkl t t val val ...
Page 58
... Figure 8.6 MII Receive Timing Table 8.19 MII Receive Timing Values MIN 40 t *0.4 clkp t *0.4 clkp 8.0 9.0 58 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t hold t su MAX UNITS NOTES ns t *0.6 ns clkp t *0.6 ns clkp ns Note 8.15 ns Note 8.15 SMSC LAN950x Family ...
Page 59
... TXD[3:0], TXEN output valid from rising edge of val TXCLK t TXD[3:0], TXEN output hold from rising edge of hold TXCLK Note 8.16 Timing was designed for system load between 10 pf and 15 pf. SMSC LAN950x Family t clkp t t clkh clkl t t val val ...
Page 60
... Figure 8.8 Turbo MII Receive Timing MIN 20 t *0.4 clkp t *0.4 clkp 5 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t hold t su MAX UNITS NOTES ns t *0.6 ns clkp t *0.6 ns clkp ns Note 8.17 ns Note 8.17 SMSC LAN950x Family ...
Page 61
... The XO/XI pin and PCB capacitance values are required to accurately calculate the value of the two external load capacitors. These two external load capacitors determine the accuracy of the 25.000 MHz frequency. SMSC LAN950x Family Table 8.22 for the recommended crystal specifications. ...
Page 62
... Center Pad to Pin Clearance 62 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet REMARKS Overall Package Height Standoff Mold Cap Thickness X/Y Body Size X/Y Mold Cap Size X/Y Exposed Pad Size Terminal Length Terminal Width Terminal Pitch SMSC LAN950x Family ...
Page 63
... The pin 1 identifier may vary, but is always located within the zone indicated. Figure 9.2 LAN950x 56-QFN Recommended PCB Land Pattern SMSC LAN950x Family 63 DATASHEET Revision 1.0 (05-17-10) ...
Page 64
... Chapter 10 Datasheet Revision History REVISION LEVEL AND DATE SECTION/FIGURE/ENTRY Rev. 1.0 Initial Release (05-17-10) Revision 1.0 (05-17-10) Table 10.1 Customer Revision History 64 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet CORRECTION SMSC LAN950x Family ...