LAN9311-NZW SMSC, LAN9311-NZW Datasheet

Ethernet ICs Two Port 10/100 Ethernet Switch

LAN9311-NZW

Manufacturer Part Number

LAN9311-NZW

Description

Ethernet ICs Two Port 10/100 Ethernet Switch

Manufacturer

SMSC

Type

Two Port Managed Ethernet Switchr

Datasheet

1.LAN9311I-NZW.pdf (8 pages)

Specifications of LAN9311-NZW

Ethernet Connection Type

10 Base-T, 100 Base-TX

Minimum Operating Temperature

0 C

Mounting Style

SMD/SMT

Product

Ethernet Switches

Number Of Transceivers

Standard Supported

802.3, 802.3u

Data Rate

10 Mbps, 100 Mbps

Supply Voltage (max)

3.3 V

Supply Voltage (min)

0 V

Maximum Operating Temperature

+ 70 C

Package / Case

TQFP-100

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

LAN9311-NZW

Manufacturer:

Standard

Quantity:

Company:

BOSTOCK HK LIMITED

Part Number:

LAN9311-NZW

Manufacturer:

Microchip Technology

Quantity:

10 000

Current page: 1 of 8
Download datasheet (300Kb)

PRODUCT FEATURES

Highlights

Target Applications

Key Benefits

SMSC LAN9311/LAN9311i

High performance and full featured 2 port switch with

Easily interfaces to most 16-bit embedded CPU’s

Unique Virtual PHY feature simplifies software

Integrated IEEE 1588 Hardware Time Stamp Unit

Cable, satellite, and IP set-top boxes

Digital televisions

Digital video recorders

VoIP/Video phone systems

Home gateways

Test/Measurement equipment

Industrial automation systems

Ethernet Switch Fabric

Switch Management

VLAN, QoS packet prioritization, Rate Limiting, IGMP

monitoring and management functions

development by mimicking the multiple switch ports

as a single port MAC/PHY

— 32K buffer RAM

— 1K entry forwarding table

— Port based IEEE 802.1Q VLAN support (16 groups)

— IEEE 802.1d spanning tree protocol support

— QoS/CoS Packet prioritization

— IGMP v1/v2/v3 monitoring for Multicast packet filtering

— Programmable filter by MAC address

— Port mirroring/monitoring/sniffing: ingress and/or egress

— Fully compliant statistics (MIB) gathering counters

— Control registers configurable on-the-fly

traffic on any ports or port pairs

– Programmable IEEE 802.1Q tag insertion/removal

– 4 dynamic QoS queues per port

– Input priority determined by VLAN tag, DA lookup,

– Programmable class of service map based on input

– Remapping of 802.1Q priority field on per port basis

– Programmable rate limiting at the ingress/egress

TOS, DIFFSERV or port default value

priority

ports with random early discard, per port / priority

PRODUCT PREVIEW

Two Port 10/100 Managed

Ethernet Switch with 16-Bit

Non-PCI CPU Interface

Ports

High-performance host bus interface

IEEE 1588 Hardware Time Stamp Unit

Comprehensive Power Management Features

Other Features

Single 3.3V power supply

Available in Commercial & Industrial Temp. Ranges

— 2 internal 10/100 PHYs with HP Auto-MDIX support

— Fully compliant with IEEE 802.3 standards

— 10BASE-T and 100BASE-TX support

— Full and half duplex support

— Full duplex flow control

— Backpressure (forced collision) half duplex flow control

— Automatic flow control based on programmable levels

— Automatic 32-bit CRC generation and checking

— Automatic payload padding

— 2K Jumbo packet support

— Programmable interframe gap, flow control pause value

— Full transmit/receive statistics

— Auto-negotiation

— Automatic MDI/MDI-X

— Loop-back mode

— Provides in-band network communication path

— Access to management registers

— Simple, SRAM-like interface

— 16-bit data bus

— Big, little, and mixed endian support

— Large TX and RX FIFO’s for high latency applications

— Programmable water marks and threshold levels

— Host interrupt support

— Global 64-bit tunable clock

— Master or slave mode per port

— Time stamp on TX or RX of Sync and Delay_req

— 64-bit timer comparator event generation (GPIO or IRQ)

— Wake on LAN

— Wake on link status change (energy detect)

— Magic packet wakeup

— Wakeup indicator event signal

— General Purpose Timer

— Serial EEPROM interface (I

— Programmable GPIOs/LEDs

LAN9311/LAN9311i

packets per port, Timestamp on GPIO

master) for non-managed configuration

C master or Microwire

Revision 1.7 (06-29-10)

Data Brief

Related parts for LAN9311-NZW

LAN9311-NZW Summary of contents

Page 1

... Programmable filter by MAC address Switch Management — Port mirroring/monitoring/sniffing: ingress and/or egress traffic on any ports or port pairs — Fully compliant statistics (MIB) gathering counters — Control registers configurable on-the-fly SMSC LAN9311/LAN9311i LAN9311/LAN9311i Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface Ports — ...

Page 2

... LAN9311-NU for 128-Pin, VTQFP Lead-Free RoHS Compliant Package (0 TO 70°C Temp Range) LAN9311-NZW for 128-Pin, XVTQFP Lead-Free RoHS Compliant Package (0 TO 70°C Temp Range) LAN9311i-NZW for 128-Pin, XVTQFP Lead-Free RoHS Compliant Package (-40 TO 85°C Temp Range) This product meets the halogen maximum concentration values per IEC61249-2-21 ...

Page 3

... MACs and PHYs support full/half duplex 10BASE-T and 100BASE-TX operation. The LAN9311/LAN9311i provides 2 on-chip PHYs, 1 Virtual PHY and 3 MACs. The Virtual PHY and the Host MAC are used to connect the LAN9311/LAN9311i switch fabric to the host bus interface. All ports support automatic or manual full duplex flow control or half duplex backpressure (forced collision) flow control ...

Page 4

... System Level Block Diagram To Ethernet Magnetics To Ethernet Magnetics GPIOs/LEDs Figure 1 System Level Block Diagram Utilizing the LAN9311/LAN9311i Internal Block Diagram IEEE 1588 Time Stamp To Ethernet 10/100 PHY IEEE 1588 Time Stamp To Ethernet 10/100 PHY IEEE 1588 Clock & Events Figure 2 LAN9311/LAN9311i Internal Block Diagram Revision 1 ...

Page 5

... Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface 128-VTQFP Package Outline Figure 3 LAN9311 128-VTQFP Package Definition MIN NOMINAL 0. 0.95 1.00 D/E 15.80 16.00 D1/E1 13.80 14.00 L 0.45 0.60 b 0.13 0. 0.40 BSC ddd 0.00 - ccc - - SMSC LAN9311/LAN9311i ...

Page 6

... E1 are maximum plastic body size dimensions including mold mismatch. 4. The pin 1 identifier may vary, but is always located within the zone indicated. Figure 4 LAN9311 128-VTQFP Recommended PCB Land Pattern Revision 1.7 (06-29-10) Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface ...

Page 7

... Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface 128-XVTQFP Package Outline Figure 5 LAN9311/LAN9311i 128-XVTQFP Package Definition SMSC LAN9311/LAN9311i 7 PRODUCT PREVIEW Revision 1.7 (06-29-10) ...

Page 8

... Dimensions D2 and E2 represent the size of the exposed pad. The exposed pad shall be coplanar with the bottom of the package within 0.05mm. 5. The pin 1 identifier may vary, but is always located within the zone indicated. Figure 6 LAN9311/LAN9311i 128-XVTQFP Recommended PCB Land Pattern Revision 1.7 (06-29-10) Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface MAX 1 ...

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