SI5023-BMR Silicon Laboratories Inc, SI5023-BMR Datasheet - Page 23

• Manufacturer Part Number: SI5023-BMR
• Description: Telecom Line Management ICs SNT/SDH GbE 2.7Gbps OC48/12/3 STM16/4/1
• Manufacturer: Silicon Laboratories Inc
• Type: Evaluation Board For Si5023 Siphy Multi-Rate Sonet/ Sth Clock and Data Recovery ICr

Specifications of SI5023-BMR

• Mounting Style: SMD/SMT
• Package / Case: MLP-28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11,14,18,21,
Pin #
10
25
12
13
15
16
17
5
6
7
8
9
Pin Name
REFCLK+
REFCLK–
DSQLCH
DOUT+
DOUT–
DIN+
DIN–
GND
VDD
LOS
LOL
LTR
Table 9. Si5023 Pin Descriptions (Continued)
I/O
O
O
O
I
I
I
Signal Level
See Table 2
See Table 2
LVTTL
LVTTL
LVTTL
LVTTL
3.3 V
GND
CML
Rev. 1.3
Differential Reference Clock (Optional).
When present, the reference clock sets the center
operating frequency of the DSPLL for clock and
data recovery. Tie REFCLK+ to VDD and REFCLK–
to GND to operate without an external reference
clock.
See Table 8 for typical reference clock frequencies.
Loss-of-Lock.
This output is driven low when the recovered clock
frequency deviates from the reference clock by the
amount specified in Table 4 on page 9. If no exter-
nal reference is supplied, this signal will be active
when the internal PLL is no longer locked to the
incoming data.
Lock-to-Reference.
When this pin is low, the DSPLL disregards the data
inputs. If an external reference is supplied, the out-
put clock is locked to the supplied reference. If no
external reference is used, the DSPLL locks the
control loop until LTR is released.
Note: This input has a weak internal pullup.
Loss-of-Signal.
This output pin is driven low when the input signal is
below the threshold set via LOS_LVL. (LOS opera-
tion is guaranteed only when ac coupling is used on
the DIN inputs.)
Data Squelch.
When driven high, this pin forces the data present
on DOUT+ = 0 and DOUT– = 1. For normal opera-
tion, this pin should be low. DSQLCH may be used
during LOS/LOL conditions to prevent random data
from being presented to the system.
Note: This input has a weak internal pulldown.
Supply Voltage.
Nominally 3.3 V.
Differential Data Input.
Clock and data are recovered from the differential
signal present on these pins. AC coupling is recom-
mended.
Production Test Input.
This pin is used during production testing and must
be tied to GND for normal operation.
Differential Data Output.
The data output signal is a retimed version of the
data recovered from the signal present on DIN.
Description
Si5023
23