SI5023-BMR Silicon Laboratories Inc, SI5023-BMR Datasheet - Page 8

• Manufacturer Part Number: SI5023-BMR
• Description: Telecom Line Management ICs SNT/SDH GbE 2.7Gbps OC48/12/3 STM16/4/1
• Manufacturer: Silicon Laboratories Inc
• Type: Evaluation Board For Si5023 Siphy Multi-Rate Sonet/ Sth Clock and Data Recovery ICr

Specifications of SI5023-BMR

• Mounting Style: SMD/SMT
• Package / Case: MLP-28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 3. AC Characteristics (Clock and Data)
(V
Si5023
8
Parameter
Output Clock Rate
Output Clock Rise Time—OC-48
Output Clock Fall Time—OC-48
Output Clock Duty Cycle
OC-48/12/3
Output Data Rise Time—OC-48
Output Data Fall Time—OC-48
Clock-to-Data Delay
FEC (2.7 GHz)
OC-48
GbE
OC-12
OC-3
Clock to Data Delay
FEC (2.7 GHz)
OC-48
Input Return Loss
Slicing Level Offset
(relative to the internally set input
common mode voltage)
Loss-of-Signal Range*
(peak-to-peak differential)
Loss-of-Signal Response Time
*Note: Adjustment voltage is calculated as follows: V
DD
= 3.3 V ±5%, T
A
= –40 to 85 °C)
Symbol
V
V
t
t
t
f
SLICE
Cr-D
CLK
Cf-D
LOS
LOS
t
t
t
t
R
R
F
F
LOS_LVL = 1.50 TO 2.50 V
LOS
SLICE_LVL = 750 mV to
RATESEL[0:1] = 01
RATESEL[0:1] = 10
RATESEL[0:1] = 00
RATESEL[0:1] = 11
Figure 3 on page 6
Figure 3 on page 6
Figure 3 on page 6
Figure 3 on page 6
Figure 2 on page 5
Figure 2 on page 5
Figure 5 on page 6
100 kHz–1.5 GHz
1.5 GHz–4.0 GHz
= (LOS_LVL – 1.50)/25.
Rev. 1.3
Test Condition
2.25 V
1.232
4000
2.46
Min
616
154
190
190
440
800
–70
–60
–15
–10
47
—
—
—
—
0
8
See Figures 12 and 13.
4100
Typ
230
230
490
860
–40
–30
70
70
50
80
80
20
—
—
—
—
—
—
—
4200
Max
1.35
675
158
110
110
265
265
560
940
–10
2.7
90
90
53
40
25
—
—
0
GHz
GHz
MHz
MHz
% of
Unit
mV
dB
dB
ps
ps
UI
ps
ps
ps
ps
µs