LX128C-32FN208C Lattice, LX128C-32FN208C Datasheet - Page 66

• Manufacturer Part Number: LX128C-32FN208C
• Description: Analog & Digital Crosspoint ICs 128 I/O Switch Matrix, 1.8V, SERDES, 3.2ns, Pb-Free
• Manufacturer: Lattice

Specifications of LX128C-32FN208C

• Maximum Dual Supply Voltage: 1.95 V
• Minimum Dual Supply Voltage: 1.65 V
• Mounting Style: SMD/SMT
• Number Of Arrays: 1
• Operating Supply Voltage: 1.8 V
• Supply Type: Triple
• Configuration: 128 x 128
• Package / Case: FPBGA-208
• Data Rate: 21 Gbps
• Input Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Output Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Product: Digital Crosspoint
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
ispGDX2-256 Logic Signal Connections (Continued)
BK3_IO15
BK3_IO24
BK3_IO25
BK3_IO26
BK3_IO27
GND
BK3_IO28
BK3_IO29
BK3_IO30/
PLL_LOCK3
BK3_IO31
RESETb
BK4_IO0
BK4_IO1/
PLL_LOCK0
BK4_IO2
BK4_IO3
GND
BK4_IO4
BK4_IO5
BK4_IO6
BK4_IO7
BK4_IO9/
PLL_FB0
GND
BK4_IO20
BK3_IO16
BK3_IO17
BK3_IO18
BK3_IO19
GND
BK3_IO20
BK3_IO21
BK3_IO22
BK3_IO23
BK4_IO8
BK4_IO10
BK4_IO11
GND
BK4_IO12
BK4_IO13
BK4_IO14
BK4_IO15
BK4_IO16
BK4_IO17/
PLL_RST0
BK4_IO18
BK4_IO19
Signal
Name
sysIO
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
-
Pair/Polarity
LVDS
55N
56P
56N
57P
57N
58P
58N
59P
59N
60P
60N
61P
61N
62P
62N
63P
63N
64N
64P
65N
65P
66N
66P
67N
67P
68N
68P
69N
69P
70N
70P
71N
71P
72N
72P
73N
73P
74N
-
-
-
Block MRB
GDX
3B
2B
2B
2B
2B
2B
2B
2B
2B
2B
2B
2B
2B
2B
2B
2B
2B
4A
4A
4A
4A
4A
4A
4A
4A
4A
4A
4A
4A
4A
4A
4A
4A
5A
5A
5A
5A
5A
-
-
-
-
15
10
11
12
13
14
15
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
-
-
-
-
-
HSI2B_CDRRSTb
HSI4A_CDRRSTb
HSI5A_CDRRSTb
FIFO2B_STRDb
FIFO4A_STRDb
FIFO5A_STRDb
SERDES Mode
HSI2B_SOUTN
HSI4A_SOUTN
HSI5A_SOUTN
HSI2B_SOUTP
HSI4A_SOUTP
HSI2B_SYDT
HSI4A_SYDT
HSI2B_SINN
HSI4A_SINN
HSI2B_SINP
HSI4A_SINP
I/O Pin
Note 4
Note 4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
63
5
5
6
6
6
HSI2B_RXD0/TXD0
HSI2B_RXD1/TXD1
HSI2B_RXD2/TXD2
HSI2B_RXD3/TXD3
HSI2B_RXD4/TXD4
HSI2B_RXD5/TXD5
HSI2B_RXD6/TXD6
HSI2B_RXD7/TXD7
HSI2B_RXD8/TXD8
HSI2B_RXD9/TXD9
HSI4A_RXD9/TXD9
HSI4A_RXD8/TXD8
HSI4A_RXD7/TXD7
HSI4A_RXD6/TXD6
HSI4A_RXD5/TXD5
HSI4A_RXD4/TXD4
HSI4A_RXD3/TXD3
HSI4A_RXD2/TXD2
HSI4A_RXD1/TXD1
HSI4A_RXD0/TXD0
HSI2B_RECCLK
HSI4A_RECCLK
HSI5A_RECCLK
SERDES Mode
HSI2B_SYDT
HSI4A_SYDT
I/O Cell
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2
5
5
ispGDX2 Family Data Sheet
FIFO2B_DIN7 /DOUT7
FIFO4A_DIN7 /DOUT7
FIFO2B_DIN0/DOUT0
FIFO2B_DIN1/DOUT1
FIFO2B_DIN2/DOUT2
FIFO2B_DIN3/DOUT3
FIFO2B_DIN4/DOUT4
FIFO2B_DIN5/DOUT5
FIFO2B_DIN6/DOUT6
FIFO2B_DIN8/DOUT8
FIFO2B_DIN9/DOUT9
FIFO4A_DIN9/DOUT9
FIFO4A_DIN8/DOUT8
FIFO4A_DIN6/DOUT6
FIFO4A_DIN5/DOUT5
FIFO4A_DIN4/DOUT4
FIFO4A_DIN3/DOUT3
FIFO4A_DIN2/DOUT2
FIFO4A_DIN1/DOUT1
FIFO4A_DIN0/DOUT0
FIFO2B_FIFORSTb
FIFO4A_FIFORSTb
FIFO5A_FIFORSTb
FIFO2B_ EMPTY
FIFO3B_EMPTY
FIFO4A_EMPTY
FIFO5A_EMPTY
FIFO Mode I/O
FIFO2B_FULL
FIFO4A_FULL
Cell/Pin
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3
fpBGA
GND
GND
GND
GND
GND
G13
G12
G11
G10
C16
D15
D14
B16
C15
B15
A15
C14
A14
D13
C13
B13
A13
D12
A10
B10
E11
E10
C10
D10
484
F13
F12
F11
F10
C9
D9
A9
C8
B8
A8
B7
C7
A7
B6
F9