SI2493-C-FT Silicon Laboratories Inc, SI2493-C-FT Datasheet - Page 151

• Manufacturer Part Number: SI2493-C-FT
• Description: 56 KBPS, V.92 ISOMODEM SYSTEM-SIDE - LEAD-FREE TSSOP 0 TO 7
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2493-C-FT

• Mfg Application Notes: SI2493/57/34/15/04, Appl Note AN93
• Data Format: V.21, V.22, V.23, V.29, V.32, V.34, V.90, V.92, Bell 103, Bell 212A
• Baud Rates: 56k
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A
Layout Guidelines
The key to a good layout is proper placement of
components. It is best to copy the placement shown in
Figure 27. Alternatively, perform the following steps,
referring to the schematics and Figure 28. It is strongly
recommended to complete the checklist in Table 101 on
page 154 while reviewing the final layout.
1. All traces, open pad sites, and vias connected to the
2. The isolation capacitors, C1, C2, C8 and C9, are the
3. Place and group the following components: U1, U2,
PPENDIX
following components are considered to be in the
DAA section and must be physically separated from
non-DAA circuits by 5 mm to achieve the best
possible surge performance: R1, R2, R3, R4, R5,
R6, R7, R8, R9, R10, R11, R15, R16, U2, Z1, D1,
FB1, FB2, RJ11, Q1, Q2, Q3, Q4, Q5, C3, C4, C5,
C6, C7, C8, C9, C10, RV1, C1 pin 2 only, C2 pin 2
only, C8 pin 2 only, and C9 pin 2 only.
only components permitted to straddle between the
DAA section and non-DAA section components and
traces. This means that for each of these capacitors,
one of the terminals is on the DAA-side, and the
other is not. Maximize the spacing between the
terminals (between pin 1 to pin 2) of each of these
capacitors.
R12*, R13*, C1, C2.
*Note: Do not use ferrite beads in place of R12 and
R13.
a.U1 and U2 are placed so that the right side of U1
b.C1 and C2 should be placed directly between U1
c.Keep R12 and R13 close to U1.
d.Place U1, U2, C1, and C2 so that the
e.Place C1 and C2 so that traces connected to U2
faces the left side of U2.
and U2.
recommended minimum creepage spacing for
the target application is implemented.
pin 5 (C1B) and U2 pin 6 (C2B) are physically
separated from traces connected to:
i.C8, R15, FB1
ii.C9, R16, FB2
iii.U2 pin 8, R7
iv.U2 pin 9, R9
A—ISO
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AYOUT
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4. Place and group the following components around
5. Place Q5 next to R2 so that the base of Q5 can be
6. Place Q4 such that the base of Q4 can be routed to
7. Place and group the following components around
8. After the previous step, there should be some space
UIDELINES
U2: C4, R9, C7, R2, C5, C6, R7, R8. These
components should form the critical “inner circle” of
components around U2.
connected to R2 directly.
U2 pin 13 easily and so the emitter of Q4 can be
routed to U2 pin 12 easily. Route these two traces
next to each other so that the loop area formed by
these two traces is minimized.
the RJ11 jack: FB1, FB2, RV1, R15, R16, C8, and
C9.
between the grouping around U2 and the grouping
of components around the RJ11 jack. Place the rest
of the components in this area, given the following
guidelines:
a.Place C4 close to U2 pin 3. This is best achieved
b.Place R9 close to U2 pin 4. This is best achieved
c.Place C7 close to U2 pin 15. This is best
d.Place R2 next to U2 pin 16. This is best achieved
e.Place C6 close to U2 pin 10. This is best
f.Place R7 and R8 close to U2. This is best
g.Place C5 close to U2 pin 7. This is best achieved
a.Use 20 mil width traces on this grouping to
b.Place C8 and C9 close to the RJ11 jack,
c.The trace from C8 to GND and the trace from C9
by placing C4 northwest of U2.
by placing R9 horizontally, directly to the north of
U2.
achieved by placing C7 next to R9.
by placing R2 northeast of U2.
achieved by placing C6 southeast of U2.
achieved by placing these components to the
south of U2.
by placing C5 southwest of U2.
minimize impedance.
recognizing that a GND trace will be routed
between C8 and C9 back to the Si24xx GND pin,
through a 20-mil width trace. The GND trace from
C8 and C9 must be isolated from the rest of the
Si3018/10 traces.
to GND must be short and equidistant.
(Si3018/10)
AN93
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