MT48LC16M16A2P-75 L:D Micron Technology Inc, MT48LC16M16A2P-75 L:D Datasheet - Page 9
![DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II Tray](/photos/7/22/72261/557-54-tsop_sml.jpg)
MT48LC16M16A2P-75 L:D
Manufacturer Part Number
MT48LC16M16A2P-75 L:D
Description
DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Specifications of MT48LC16M16A2P-75 L:D
Density
256 Mb
Maximum Clock Rate
133 MHz
Package
54TSOP-II
Address Bus Width
15 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
6|5.4 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
256M (16Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
54-TSOP II
Organization
16Mx16
Address Bus
15b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Functional Block Diagrams
Figure 1: 64 Meg x 4 Functional Block Diagram
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
A[12:0]
BA[1:0]
CAS#
RAS#
WE#
CKE
CLK
CS#
15
ADDRESS
REGISTER
MODE REGISTER
CONTROL
LOGIC
12
COUNTER
REFRESH
13
11
2
13
ADDRESS
2
ROW-
MUX
COUNTER/
COLUMN-
CONTROL
ADDRESS
LATCH
LOGIC
BANK
13
DECODER
ADDRESS
BANK0
LATCH
ROW-
&
11
8192
9
READ DATA LATCH
SENSE AMPLIFIERS
DQM MASK LOGIC
(8192 x 2048 x 4)
WRITE DRIVERS
I/O GATING
DECODER
COLUMN
MEMORY
BANK0
ARRAY
8192
2048
(x4)
BANK1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
BANK2
BANK3
256Mb: x4, x8, x16 SDRAM
Functional Block Diagrams
4
4
1
REGISTER
REGISTER
OUTPUT
© 1999 Micron Technology, Inc. All rights reserved.
INPUT
DATA
DATA
1
4
DQM
DQ[3:0]