MT48LC2M32B2P-7 IT:G Micron Technology Inc, MT48LC2M32B2P-7 IT:G Datasheet - Page 35
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MT48LC2M32B2P-7 IT:G
Manufacturer Part Number
MT48LC2M32B2P-7 IT:G
Description
DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC2M32B2P-7_ITG.pdf
(69 pages)
Specifications of MT48LC2M32B2P-7 IT:G
Density
64 Mb
Maximum Clock Rate
143 MHz
Package
86TSOP-II
Address Bus Width
13 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
17|8|5.5 ns
Operating Temperature
-40 to 85 °C
Organization
2Mx32
Address Bus
13b
Access Time (max)
17/8/5.5ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
160mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Burst Read/Single Write
Figure 25:
Figure 26:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
Clock Suspend During WRITE Burst
Clock Suspend During READ Burst
Note:
Clock suspend mode is exited by registering CKE HIGH; the internal clock and related
operation will resume on the subsequent positive clock edge.
The burst read/single write mode is entered by programming the write burst mode bit
(M9) in the mode register to a logic 1. In this mode, all WRITE commands result in the
access of a single column location (burst of one), regardless of the programmed burst
length. READ commands access columns according to the programmed burst length
and sequence, just as in the normal mode of operation (M9 = 0).
COMMAND
COMMAND
INTERNAL
INTERNAL
ADDRESS
ADDRESS
CLOCK
CLOCK
For this example, CL = 2, BL = 4 or greater, and DQM is LOW.
CLK
CKE
CLK
CKE
D
DQ
IN
NOP
T0
BANK,
COL n
T0
READ
WRITE
BANK,
COL n
T1
T1
D
NOP
n
IN
T2
T2
NOP
35
D
OUT
n
T3
T3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
n + 1
D
OUT
NOP
n + 1
T4
T4
D
NOP
IN
DON’T CARE
T5
T5
NOP
n + 2
D
NOP
IN
n + 2
D
OUT
DON’T CARE
T6
NOP
D
n + 3
OUT
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
Commands