MT48LC4M16A2B4-75 IT:G Micron Technology Inc, MT48LC4M16A2B4-75 IT:G Datasheet - Page 17

DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin VFBGA Tray

MT48LC4M16A2B4-75 IT:G

Manufacturer Part Number
MT48LC4M16A2B4-75 IT:G
Description
DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC4M16A2B4-75 IT:G

Package
54VFBGA
Density
64 Mb
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Clock Rate
133 MHz
Maximum Random Access Time
6|5.4 ns
Operating Temperature
-40 to 85 °C
Organization
4Mx16
Address Bus
14b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Figure 7:
Table 6:
Operating Mode
Write Burst Mode
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
CAS Latency
CAS Latency
Reserved states should not be used as unknown operation or incompatibility with future
versions may result.
COMMAND
COMMAND
The normal operating mode is selected by setting M7 and M8 to zero; the other combi-
nations of values for M7 and M8 are reserved for future use and/or test modes. The
programmed burst length applies to both read and write bursts.
Test modes and reserved states should not be used because unknown operation or
incompatibility with future versions may result.
When M9 = 0, the burst length programmed via M0–M2 applies to both read and write
bursts; when M9 = 1, the programmed burst length applies to read bursts, but write
accesses are single-location (nonburst) accesses.
CLK
CLK
DQ
DQ
Speed
-7E
-75
-6
READ
READ
T0
T0
CL = 2
NOP
NOP
T1
T1
t
t AC
LZ
17
CL = 3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
Allowable Operating Frequency (MHz)
T2
NOP
t
t AC
D
LZ
t OH
CL = 2
OUT
≤133
≤100
T3
T3
NOP
D
t OH
OUT
64Mb: x4, x8, x16 SDRAM
DON’T CARE
UNDEFINED
Functional Description
©2000 Micron Technology, Inc. All rights reserved.
T4
CL = 3
≤166
≤143
≤133

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