MT48LC8M16A2TG-7E:G Micron Technology Inc, MT48LC8M16A2TG-7E:G Datasheet - Page 34

• Manufacturer Part Number: MT48LC8M16A2TG-7E:G
• Description: DRAM Chip SDRAM 128M-Bit 8Mx16 3.3V 54-Pin TSOP-II Tray
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC8M16A2TG-7E:G

• Density: 128 Mb
• Maximum Clock Rate: 143 MHz
• Package: 54TSOP-II
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 5.4 ns
• Operating Temperature: 0 to 70 °C
• Organization: 8Mx16
• Address Bus: 14b
• Access Time (max): 5.4ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 165mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

Figure 23:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
WRITE-to-READ
Data for a fixed-length WRITE burst may be followed by, or truncated with, a
PRECHARGE command to the same bank (provided that auto precharge was not acti-
vated), and a full-page WRITE burst may be truncated with a PRECHARGE command to
the same bank. The PRECHARGE command should be issued
which the last desired input data element is registered. The auto precharge mode
requires a
frequency. In addition, when truncating a WRITE burst, the DQM signal must be used to
mask input data for the clock edge prior to, and the clock edge coincident with, the
PRECHARGE command. An example is shown in Figure 24 on page 35. Data n + 1 is
either the last of a burst of two or the last desired of a longer burst. Following the
PRECHARGE command, a subsequent command to the same bank cannot be issued
until
In the case of a fixed-length burst being executed to completion, a PRECHARGE
command issued at the optimum time (as described above) provides the same operation
that would result from the same fixed-length burst with auto precharge. The disadvan-
tage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length or full-page bursts.
Fixed-length or full-page WRITE bursts can be truncated with the BURST TERMINATE
command. When truncating a WRITE burst, the input data applied coincident with the
BURST TERMINATE command will be ignored. The last data written (provided that
DQM is LOW at that time) will be the input data applied 1 clock previous to the BURST
TERMINATE command. This is shown in Figure 25 on page 35, where data n is the last
desired data element of a longer burst.
COMMAND
ADDRESS
t
RP is met.
CLK
DQ
t
WR of at least 1 clock plus time (see note 24 on page 52), regardless of
WRITE
BANK,
COL n
D
T0
n
IN
n + 1
NOP
T1
D
IN
34
TRANSITIONING DATA
BANK,
READ
COL b
T2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
NOP
NOP
D
T4
OUT
b
128Mb: x4, x8, x16 SDRAM
DON’T CARE
NOP
b + 1
T5
D
OUT
t
WR after the clock edge at
©1999 Micron Technology, Inc. All rights reserved.
Operations